C8051F351 Silicon Laboratories Inc, C8051F351 Datasheet - Page 225

IC 8051 MCU 8K FLASH 28MLP

C8051F351

Manufacturer Part Number
C8051F351
Description
IC 8051 MCU 8K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F35xr
Datasheets

Specifications of C8051F351

Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x24b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F351-GM
Manufacturer:
SiliconL
Quantity:
5
24.2. C2 Pin Sharing
The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging, Flash
programming, and boundary scan functions may be performed. This is possible because C2 communica-
tion is typically performed when the device is in the halt state, where all on-chip peripherals and user soft-
ware are stalled. In this halted state, the C2 interface can safely ‘borrow’ the C2CK (/RST) and C2D (P2.0)
pins. In most applications, external resistors are required to isolate C2 interface traffic from the user appli-
cation. A typical isolation configuration is shown in Figure 24.6.
The configuration in Figure 24.6 assumes the following:
Additional resistors may be necessary depending on the specific application.
1. The user input (b) cannot change state while the target device is halted.
2. The /RST pin on the target device is used as an input only.
/Reset (a)
Output (c)
Input (b)
Figure 24.6. Typical C2 Pin Sharing
C2 Interface Master
Rev. 0.4
C2CK
C2D
C8051Fxxx
C8051F350/1/2/3
225

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