C8051F330D Silicon Laboratories Inc, C8051F330D Datasheet - Page 103

• Manufacturer Part Number: C8051F330D
• Description: IC 8051 MCU 8K FLASH 20DIP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F33xr

Specifications of C8051F330D

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: 336-1155

13.
C8051F330/1, C8051F330D devices include a programmable internal high-frequency oscillator, a pro-
grammable internal low-frequency oscillator, and an external oscillator drive circuit. The internal high-fre-
quency oscillator can be enabled/disabled and calibrated using the OSCICN and OSCICL registers, as
shown in Figure 13.1. The internal low-frequency oscillator can be enabled/disabled and calibrated using
the OSCLCN register, as shown in Figure 13.4. The system clock can be sourced by the external oscillator
circuit or either internal oscillator. Both internal oscillators offer a selectable post-scaling feature. The inter-
nal oscillators’ electrical specifications are given in Table 13.1 on page 112.
13.1. Programmable Internal High-Frequency (H-F) Oscillator
All C8051F330/1, C8051F330D devices include a programmable internal high-frequency oscillator that
defaults as the system clock after a system reset. The internal oscillator period can be adjusted via the
OSCICL register as defined by Figure 13.2.
On C8051F330/1, C8051F330D devices, OSCICL is factory calibrated to obtain a 24.5 MHz base fre-
quency.
Electrical specifications for the precision internal oscillator are given in Table 13.1 on page 112. Note that
the system clock may be derived from the programmed internal oscillator divided by 1, 2, 4, or 8, as
defined by the IFCN bits in register OSCICN. The divide value defaults to 8 following a reset.
Oscillators
VDD
Option 2
Option 3
XTAL2
XTAL2
Option 1
Option 4
XTAL2
10MΩ
Figure 13.1. Oscillator Diagram
XTAL1
XTAL2
OSCICL
C8051F330/1, C8051F330D
Rev. 1.2
Circuit
OSCLF
Low Frequency
Input
Programmable
Internal Clock
Generator
OSCXCN
Oscillator
OSC
EN
EN
OSCICN
OSCLD
n
n
CLKSEL
OSCLCN
OSCLF OSCLD
SYSCLK
103