R5F21132FP Renesas Electronics America, R5F21132FP Datasheet - Page 9

IC R8C MCU FLASH 8K 32LQFP

R5F21132FP

Manufacturer Part Number
R5F21132FP
Description
IC R8C MCU FLASH 8K 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/13r
Datasheet

Specifications of R5F21132FP

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
22
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0E521134CPE00 - EMULATOR COMPACT R8C/13
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21132FP
Manufacturer:
RENESAS
Quantity:
15 720
Part Number:
R5F21132FP#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/13 Group
Rev.1.20
REJ03B0069-0120
2. Central Processing Unit (CPU)
Figure 2.1 CPU Register
Figure 2.1 shows the CPU Register. The CPU contains 13 registers. Of these, R0, R1, R2, R3, A0, A1 and
FB comprise a register bank. Two sets of register banks are provided.
2.1 Data Registers (R0, R1, R2 and R3)
R0 is a 16-bit register for transfer, arithmetic and logic operations. The same applies to R1 to R3. The R0
can be split into high-order bit (R0H) and low-order bit (R0L) to be used separately as 8-bit data registers.
The same applies to R1H and R1L as R0H and R0L. R2 can be combined with R0 to be used as a 32-bit
data register (R2R0). The same applies to R3R1 as R2R0.
Jan 27, 2006
b 3 1
N O T E S :
1 . A r e g i s t e r b a n k c o m p r i s e s t h e s e r e g i s t e r s . T w o s e t s o f r e g i s t e r b a n k s a r e p r o v i d e d
page 7 of 27
R 2
R 3
b 1 5
I P L
b 1 9
b 1 9
The 4-high order bits of INTB are INTBH and
the 16-low bits of INTB are INTBL.
I N T B H
b 1 5
b 1 5
b15
b 1 5
R0H(High-order of R0)
R1H(High-order of R1) R1L(Low-order of R1)
b8
b 7
U
P C
I
I N T B L
USP
I S P
F L G
SB
b 8 b 7
F B
R2
R3
A0
A1
O
R 0 L ( L o w - o r d e r o f R 0 )
B
S
Z
D
C
b0
b0
b0
b0
b0
b0
D a t a r e g i s t e r s
Address registers
F r a m e b a s e r e g i s t e r s
I n t e r r u p t t a b l e r e g i s t e r
P r o g r a m c o u n t e r
User stack pointer
I n t e r r u p t s t a c k p o i n t e r
Static base register
F l a g r e g i s t e r
Carry flag
Debug flag
Zero flag
Sign flag
Register bank select flag
Overflow flag
Interrupt enable flag
Stack pointer select flag
Reserved bit
Processor interrupt priority level
Reserved bit
2. Central Processing Unit (CPU)
( 1 )
(1)
( 1 )

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