HD6412350F20 Renesas Electronics America, HD6412350F20 Datasheet - Page 235

IC H8S MPU ROMLESS 5V 128QFP

HD6412350F20

Manufacturer Part Number
HD6412350F20
Description
IC H8S MPU ROMLESS 5V 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of HD6412350F20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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2.2.60 (4)
SHLR (SHift Logical Right)
Operation
Rd (right logical shift)
Assembly-Language Format
SHLR.W #2, Rd
Operand Size
Word
Description
This instruction shifts the bits in a 16-bit register Rd (destination operand) two bits to the right. Bit
1 shifts into the carry flag. Bits 15 and 14 are cleared to 0.
Available Registers
Rd: R0 to R7, E0 to E7
Operand Format and Number of States Required for Execution
Notes
Register direct
Addressing
Mode
SHLR (W)
Mnemonic
0
SHLR.W
MSB
Rd
b15
0
Operands
#2, Rd
b14
0
.
. . . . . .
.
1st byte
1
.
.
1
Condition Code
H: Previous value remains unchanged.
N: Always cleared to 0.
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 1.
.
2nd byte
5
.
Instruction Format
cleared to 0.
Rev. 4.00 Feb 24, 2006 page 219 of 322
I
b1
rd
UI H
Section 2 Instruction Descriptions
LSB
b0
3rd byte
U
C
N
0
4th byte
REJ09B0139-0400
Z
Shift Logical
V
0
States
No. of
C
1

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