MCHC11F1CFNE3 Freescale Semiconductor, MCHC11F1CFNE3 Datasheet - Page 22

• Manufacturer Part Number: MCHC11F1CFNE3
• Description: IC MCU 8BIT 1K RAM 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MCHC11F1CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• A/d Inputs: 8-Channel, 8-Bit
• Eeprom Memory: 512 Bytes
• Input Output: 30
• Interface: SCI/SPI
• Memory Type: EPROM
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 0 Bytes
• Timers: 3-16-bit
• Voltage, Range: 3-5.5 V
• Controller Family/series: 68HC11
• No. Of I/o's: 30
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC11F
• Core: HC11
• Data Bus Width: 8 bit
• Program Memory Size: 512 B
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: RoHS Compliant part

INIT — RAM and I/O Mapping (MC68HC11F1 only)
RAM[3:0] — Internal RAM Map Position
REG[3:0] — 96-Byte Register Block Map Position
GWOM — Port G Wired-OR Mode Option
22
OPT2 — System Configuration Option Register 2
RESET
RESET:
The INIT register can be written only once in first 64 cycles out of reset in normal modes, or at any time
in special modes.
These bits determine the upper four bits of the RAM address and allow mapping of the RAM to any four-
Kbyte boundary. Refer to Table 10.
These bits determine bits the upper 4 bits of the register block and allow mapping of the register block
to any four-Kbyte boundary. Refer to Table 10.
Refer to 7.8 Parallel I/O Registers, page 36.
GWOM
RAM3
Bit 7
Bit 7
0
0
The register diagram above applies to the MC68HC11F1 only. A diagram and bit
descriptions of the INIT register in the MC68HC11FC0 are provided elsewhere in
this section.
RAM[3:0]
CWOM
RAM2
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
6
0
6
0
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 10 RAM and Register Mapping
CLK4X
RAM1
$C000-$C3FF
$D000-$D3FF
$A000-$A3FF
$B000-$B3FF
$E000-$E3FF
$0000-$03FF
$1000-$13FF
$2000-$23FF
$3000-$33FF
$4000-$43FF
$5000-$53FF
$6000-$63FF
$7000-$73FF
$8000-$83FF
$9000-$93FF
$F000-$F3FF
5
1
5
0
Location
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LIRDV
RAM0
4
0
4
0
NOTE
REG3
—
3
0
3
0
REG[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
SPRBYP
REG4
2
0
2
0
$C000-$C05F
$D000-$D05F
$A000-$A05F
$B000-$B05F
$E000-$E05F
$F000-$F05F
$0000-$005F
$1000-$105F
$2000-$205F
$3000-$305F
$4000-$405F
$5000-$505F
$6000-$605F
$7000-$705F
$8000-$805F
$9000-$905F
Location
REG1
—
1
0
1
0
MC68HC11F1/FC0
REG0
Bit 0
MC68HC11FTS/D
Bit 0
—
0
1
$x03D
$x038