MC9S08RD32CPE Freescale Semiconductor, MC9S08RD32CPE Datasheet - Page 116

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MC9S08RD32CPE

Manufacturer Part Number
MC9S08RD32CPE
Description
IC MCU 32K FLASH 2K RAM 28-DIP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08RD32CPE

Core Processor
HCS08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Carrier Modulator Transmitter (CMT) Block Description
For an example of extended space operation, see
8.5.3.2
In FSK mode, the modulator continues to count carrier out clocks, alternating between the primary and
secondary registers at the end of each modulation period.
To calculate the length of an extended space in FSK mode, the user must know whether the EXSPC bit
was set on a primary or secondary modulation period, as well as the total number of both primary and
secondary modulation periods completed while the EXSPC bit is high. A status bit for the current
modulation is not accessible to the CPU. If necessary, software should maintain tracking of the current
modulation cycle (primary or secondary). The extended space period ends at the completion of the space
period time of the modulation period during which the EXSPC bit is cleared.
If the EXSPC bit was set during a primary modulation cycle, use the equation:
Where the subscripts p and s refer to mark and space times for the primary and secondary modulation
cycles.
If the EXSPC bit was set during a secondary modulation cycle, use the equation:
8.5.4
The transmitter output block controls the state of the infrared out pin (IRO). The modulator output is gated
on to the IRO pin when the modulator/carrier generator is enabled. When the modulator/carrier generator
is disabled, the IRO pin is controlled by the state of the IRO latch.
A polarity bit in the CMTOC register enables the IRO pin to be high true or low true.
116
Transmitter
EXSPC Operation in FSK Mode
The EXSPC feature can be used to emulate a zero mark event.
t
SET EXSPC
exspace
t
t
exspace
exspace
= t
space
= (t
= (t
space
space
+ (t
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Figure 8-7. Extended Space Operation
mark
)
)
p
s
+ (t
+ (t
+ t
mark
mark
space
+ t
+ t
) x (number of modulation periods)
space
space
CLEAR EXSPC
Figure
NOTE
)
)
s
p
+ (t
+ (t
8-7.
mark
mark
+ t
+ t
space
space
)
)
p
s
+...
+...
Freescale Semiconductor
Eqn. 8-10
Eqn. 8-11
Eqn. 8-9

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