MC9S12E256VFUE Freescale Semiconductor, MC9S12E256VFUE Datasheet - Page 546
MC9S12E256VFUE
Manufacturer Part Number
MC9S12E256VFUE
Description
IC MCU 256K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12E256CFUE.pdf
(602 pages)
Specifications of MC9S12E256VFUE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
80-QFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
60
Number Of Timers
12
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
On-chip Dac
8 bit, 2 Channel
Package
80PQFP
Family Name
HCS12
Maximum Speed
50 MHz
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12E256VFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 19 Module Mapping Control (MMCV4)
19.3.2.3
Read: Anytime
Write: The EEON bit can be written to any time on all devices. Bits E[11:15] are “write anytime in all
modes” on most devices. On some devices, bits E[11:15] are “write once in normal and emulation modes
and write anytime in special modes”. See
(MC9S12E256DGV1)”
This register initializes the position of the internal EEPROM within the on-chip system memory map.
546
1. The reset state of this register is controlled at chip integration. Please refer to
EE[15:11]
Reset
(MC9S12E256DGV1)”
EEON
Field
7:3
0
W
R
1
EE15
Internal EEPROM Map Position — These bits determine the upper five bits of the base address for the system’s
internal EEPROM array.
Enable EEPROM — This bit is used to enable the EEPROM memory in the memory map.
0 Disables the EEPROM from the memory map.
1 Enables the EEPROM in the memory map at the address selected by EE[15:11].
Initialization of Internal EEPROM Position Register (INITEE)
—
7
Writes to this register take one cycle to go into effect.
Figure 19-5. Initialization of Internal EEPROM Position Register (INITEE)
= Unimplemented or Reserved
to determine the actual reset state of this register.
EE14
to determine the actual write access rights.
—
6
Table 19-4. INITEE Field Descriptions
EE13
MC9S12E256 Data Sheet, Rev. 1.08
—
5
Chapter 1, “MC9S12E256 Device Overview
EE12
NOTE
—
4
Description
EE11
—
3
Chapter 1, “MC9S12E256 Device Overview
—
0
2
Freescale Semiconductor
—
0
1
EEON
—
0
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