MCHC908GR8VFAE Freescale Semiconductor, MCHC908GR8VFAE Datasheet - Page 282

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MCHC908GR8VFAE

Manufacturer Part Number
MCHC908GR8VFAE
Description
IC MCU 8K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908GR8VFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCHC908GR8VFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
System Integration Module (SIM)
19.5.3 SIM Counter and Reset States
19.6 Exception Control
19.6.1 Interrupts
Technical Data
282
External reset has no effect on the SIM counter. (See
details.) The SIM counter is free-running after all reset states. (See
Active Resets from Internal Sources
reset recovery sequences.)
Normal, sequential program execution can be changed in three different
ways:
At the beginning of an interrupt, the CPU saves the CPU register
contents on the stack and sets the interrupt mask (I bit) to prevent
additional interrupts. At the end of an interrupt, the RTI instruction
recovers the CPU register contents from the stack so that normal
processing can resume.
19-9
Interrupts are latched, and arbitration is performed in the SIM at the start
of interrupt processing. The arbitration result is a constant that the CPU
uses to determine which vector to fetch. Once an interrupt is latched by
the SIM, no other interrupt can take precedence, regardless of priority,
until the latched interrupt is serviced (or the I bit is cleared). See
19-10.
Freescale Semiconductor, Inc.
For More Information On This Product,
shows interrupt recovery timing.
Interrupts:
– Maskable hardware CPU interrupts
– Non-maskable software interrupt instruction (SWI)
Reset
Break interrupts
System Integration Module (SIM)
Go to: www.freescale.com
Figure 19-8
shows interrupt entry timing.
for counter control and internal
MC68HC908GR8 — Rev 4.0
Stop Mode
MOTOROLA
Figure
Figure
for

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