MCHC908GR8VFAE Freescale Semiconductor, MCHC908GR8VFAE Datasheet - Page 64

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MCHC908GR8VFAE

Manufacturer Part Number
MCHC908GR8VFAE
Description
IC MCU 8K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908GR8VFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCHC908GR8VFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Resets and Interrupts
4.3.3.3 Low-Voltage Inhibit Reset
4.3.3.4 Illegal Opcode Reset
4.3.3.5 Illegal Address Reset
Technical Data
64
A low-voltage inhibit (LVI) reset is an internal reset caused by a drop in
the power supply voltage to the LVI trip voltage, V
An LVI reset:
An illegal opcode reset is an internal reset caused by an opcode that is
not in the instruction set. An illegal opcode reset sets the ILOP bit in the
SIM reset status register.
If the stop enable bit, STOP, in the mask option register is a logic 0, the
STOP instruction causes an illegal opcode reset.
An illegal address reset is an internal reset caused by opcode fetch from
an unmapped address. An illegal address reset sets the ILAD bit in the
SIM reset status register.
A data fetch from an unmapped address does not generate a reset.
Freescale Semiconductor, Inc.
For More Information On This Product,
Holds the clocks to the CPU and modules inactive for an oscillator
stabilization delay of 4096 CGMXCLK cycles after the power
supply voltage rises to V
Drives the RST pin low for as long as V
during the oscillator stabilization delay
Releases the RST pin 32 CGMXCLK cycles after the oscillator
stabilization delay
Releases the CPU to begin the reset vector sequence
64 CGMXCLK cycles after the oscillator stabilization delay
Sets the LVI bit in the SIM reset status register
Go to: www.freescale.com
Resets and Interrupts
TRIPF
DD
MC68HC908GR8 — Rev 4.0
is below V
TRIPF
.
TRIPF
MOTOROLA
and

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