HD6417760BP200QS Renesas Electronics America, HD6417760BP200QS Datasheet - Page 553

IC SUPERH MCU ROMLESS 256BGA

HD6417760BP200QS

Manufacturer Part Number
HD6417760BP200QS
Description
IC SUPERH MCU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BP200QS

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
AC97 codec 0
AC97 codec 1
I
2
I
2
S codec 0
S codec 1
or
or
SH7760
Figure 11.31 Configuration of DMA for HAC/SSI
transmit and receive
transmit and receive
transmit or receive
transmit or receive
HAC(0)
HAC(1)
SSI(0)
SSI(1)
Specified by IPSELR in PFC
External synchronous DRAM
Transfer start address
Half of the transfer size
Transfer end address
DMAC
DMABRG
External bus
Transmit FIFO (0)
Transmit FIFO (1)
Receive FIFO (0)
Receive FIFO (1)
Transmit/receive
Memory space
Rev. 2.00 Feb. 12, 2010 Page 469 of 1330
buffer
Transfer request
priority control
2-stage buffer control for audio data is
enabled by using two types of interrupts:
one is generated when half of data has
been transferred and another one is
generated when all data has been transferred.
REJ09B0554-0200
Peripheral bus
Bus state
controller

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