MC68HC705C8AVFNE Freescale Semiconductor, MC68HC705C8AVFNE Datasheet - Page 9
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MC68HC705C8AVFNE
Manufacturer Part Number
MC68HC705C8AVFNE
Description
IC MCU 8BIT 44-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet
1.MC68HC705C8AB.pdf
(222 pages)
Specifications of MC68HC705C8AVFNE
Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
304 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC705C8AVFNE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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MC68HC705C8A — Rev. 3
MOTOROLA
5.3
5.3.1
5.3.2
5.3.3
5.3.4
6.1
6.2
6.3
6.3.1
6.3.2
6.3.3
6.3.4
6.4
6.4.1
6.4.2
6.5
7.1
7.2
7.3
7.3.1
7.3.2
7.3.3
7.4
7.4.1
7.4.2
7.4.3
Freescale Semiconductor, Inc.
For More Information On This Product,
Reset Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Data-Retention Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Power-On Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
External Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Programmable and Non-Programmable
Clock Monitor Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
SCI During Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
SPI During Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Programmable COP Watchdog in Stop Mode . . . . . . . . . . . 71
Non-Programmable COP Watchdog in Stop Mode . . . . . . . 73
Programmable COP Watchdog in Wait Mode . . . . . . . . . . . 75
Non-Programmable COP Watchdog in Wait Mode . . . . . . . 75
Port A Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Data Direction Register A. . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Port A Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Port B Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Data Direction Register B. . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Port B Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Go to: www.freescale.com
COP Watchdog Resets . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Section 7. Parallel Input/Output (I/O)
Table of Contents
Section 6. Low-Power Modes
Table of Contents
Technical Data
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