MC9S08DV48MLF Freescale Semiconductor, MC9S08DV48MLF Datasheet - Page 253
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MC9S08DV48MLF
Manufacturer Part Number
MC9S08DV48MLF
Description
IC MCU 48K FLASH 2K RAM 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08DV48MLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DV48MLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale Semiconductor
Extended Identifier
Standard Identifier
CAN 2.0A/B
•
•
•
CAN 2.0B
Four identifier acceptance filters, each to be applied to
— a) the 14 most significant bits of the extended identifier plus the SRR and IDE bits of CAN 2.0B
— b) the 11 bits of the standard identifier, the RTR and IDE bits of CAN 2.0A/B messages.
Eight identifier acceptance filters, each to be applied to the first 8 bits of the identifier. This mode
implements eight independent filters for the first 8 bits of a CAN 2.0A/B compliant standard
identifier or a CAN 2.0B compliant extended identifier.
filter bank (CANIDAR0–CANIDAR3, CANIDMR0–CANIDMR3) produces filter 0 to 3 hits.
Similarly, the second filter bank (CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7)
produces filter 4 to 7 hits.
Closed filter. No CAN message is copied into the foreground buffer RxFG, and the RXF flag is
never set.
messages or
Figure 12-40
CANIDMR0–3CANIDMR) produces filter 0 and 1 hits. Similarly, the second filter bank
(CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7) produces filter 2 and 3 hits.
AM7
AC7
ID28
ID10
CANIDMR0
CANIDAR0
IDR0
IDR0
Figure 12-39. 32-bit Maskable Identifier Acceptance Filter
shows how the first 32-bit filter bank (CANIDAR0–CANIDA3,
AM0
ID21
AC0
ID3
MC9S08DV60 Series Data Sheet, Rev 3
AM7
AC7
ID20
ID2
CANIDMR1
CANIDAR1
IDR1
IDR1
ID Accepted (Filter 0 Hit)
IDE
Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
AM0
ID15
AC0
AM7
AC7
ID14
ID10
Figure 12-41
CANIDMR2
CANIDAR2
IDR2
IDR2
shows how the first 32-bit
AM0
AC0
ID7
ID3
AM7
AC7
ID6
ID10
CANIDMR3
CANIDAR3
IDR3
IDR3
AM0
AC0
RTR
ID3
253
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