SAF-XC167CI-32F40F BB-A Infineon Technologies, SAF-XC167CI-32F40F BB-A Datasheet - Page 10

• Manufacturer Part Number: SAF-XC167CI-32F40F BB-A
• Description: IC MCU 16BIT 256KB TQFP-144-19
• Manufacturer: Infineon Technologies
• Series: XC16xr

Specifications of SAF-XC167CI-32F40F BB-A

• Core Processor: C166SV2
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 103
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.7 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFQFP
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: 2xASC, 2xSSC, 1xI2C
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 103
• Number Of Timers: 11
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Packages: PG-TQFP-144
• Max Clock Frequency: 40.0 MHz
• Sram (incl. Cache): 12.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 16
• Program Memory: 256.0 KByte
• For Use With: B158-H8963-X-X-7600IN - KIT EASY XC167CIMCBX167-NET - BOARD EVAL INFINEON CAN/ETHRNTMCBXC167-BASIC - BOARD EVAL BASIC INFINEON XC16X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: FX167CI32F40FBBANT; SAFXC167CI32F40FBBAT; SP000104964; SP000224702

2.2
The pins of the XC167 are described in detail in
functions.
the 4 sides of the package. E*) and C*) mark pins to be used as alternate external
interrupt inputs, C*) marks pins that can have CAN interface lines assigned to them.
Figure 2
Data Sheet
P9.0/SDA0/CC16IO/C*)
P9.2/SDA1/CC18IO/C*)
P9.1/SCL0/CC17IO/C*)
P9.3/SCL1/CC19IO/C*)
P5.10/AN10/T6EUD
P5.11/AN11/T5EUD
P9.4/SDA2/CC20IO
P9.5/SCL2/CC21IO
P6.7/BREQ/CC7IO
P6.5/HOLD/CC5IO
P6.6/HLDA/CC6IO
P7.4/CC28IO/C*)
P7.5/CC29IO/C*)
P7.6/CC30IO/C*)
P7.7/CC31IO/C*)
P20.12/RSTOUT
P6.0/CS0/CC0IO
P6.1/CS1/CC1IO
P6.2/CS2/CC2IO
P6.3/CS3/CC3IO
P6.4/CS4/CC4IO
P5.0/AN0
P5.1/AN1
P5.2/AN2
P5.3/AN3
P5.4/AN4
P5.5/AN5
Figure 2
Pin Configuration and Definition
V
V
V
N.C.
N.C.
V
V
V
NMI
DDP
DDP
DDP
SSP
SSP
SSP
Pin Configuration (top view)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
summarizes all pins in a condensed way, showing their location on
XC167
8
Table
2, including all their alternate
General Device Information
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
XC167CI-32F
N.C.
N.C.
P0H.1/AD9
P0H.0/AD8
V
V
P0L.7/AD7
P0L.6/AD6
P0L.5/AD5
P0L.4/AD4
P0L.3/AD3
P0L.2/AD2
P0L.1/AD1
P0L.0/AD0
P20.5/EA
P20.4/ALE
P20.2/READY
P20.1/WR/WRL
P20.0/RD
V
V
P4.7/A23/C*)
P4.6/A22/C*)
P4.5/A21/C*)
P4.4/A20/C*)
P4.3/A19
P4.2/A18
P4.1/A17
P4.0/A16
V
V
P3.15/CLKOUT/FOUT
P3.13/SCLK0/E*)
P3.12/BHE/WRH/E*)
TMS
TDO
Derivatives
SSP
DDP
SSP
DDP
SSI
DDI
V1.1, 2006-08
MCP06458