SAK-TC1796-256F150E BC Infineon Technologies, SAK-TC1796-256F150E BC Datasheet - Page 123
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SAK-TC1796-256F150E BC
Manufacturer Part Number
SAK-TC1796-256F150E BC
Description
IC MCU 32BIT FLASH BGA-416
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet
1.SAK-TC1796-256F150E_BE.pdf
(134 pages)
Specifications of SAK-TC1796-256F150E BC
Core Processor
TriCore
Core Size
32-Bit
Speed
150MHz
Connectivity
ASC, CAN, EBI/EMI, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
123
Program Memory Size
2MB (2M x 8)
Program Memory Type
FLASH
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 44x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
416-BGA
Data Bus Width
32 bit
Data Ram Size
256 KB
Interface Type
2xASC, 2xSSC, 2xMSC, 2xMLI
Maximum Clock Frequency
150 MHz
Number Of Programmable I/os
123
Number Of Timers
260
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 10 bit, 12 bit, 44 Channel
Packages
P-BGA-416
Max Clock Frequency
150.0 MHz
Sram (incl. Cache)
256.0 KByte
Can Nodes
4
A / D Input Lines (incl. Fadc)
44
Program Memory
2.0 MB
For Use With
B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Other names
SAKTC1796256F150EBCT
SP000097527
SP000097528
SP000097527
SP000097528
4.3.10
V
T
Table 30
Parameter
Output delay from BFCLKO
rising edge
RD active/inactive after
BFCLKO rising edge
CSx output delay from
BFCLKO rising edge
ADV/BAA active/inactive after
BFCLKO rising edge
Data setup to BFCLKI rising
edge
Data hold from BFCLKI rising
edge
WAIT setup (low or high) to
BFCLKI rising edge
WAIT hold (low or high) from
BFCLKI rising edge
1) Not subject to production test, verified by design/characterization.
2) This parameter is valid for BFCON.EBSE0 = 1 (or BFCON.EBSE1 = 1). Note that
Data Sheet
A
SS
1/2 of the LMB bus clock period
= -40 °C to +125 °C;
= 0 V;
V
EBU Burst Mode Read Timing
DD
EBU Burst Mode Read Timing Parameters
= 1.5 V ± 5%;
2)
C
L
= 35 pF;
T
V
CPU
DDEBU
Symbol
t
t
t
t
t
t
t
t
= 1/
10
12
21
22
23
24
25
26
f
CPU
= 2.5 V ± 5% and 3.3 V ± 5%, Class B pins;
CC 0
CC 0
CC 0
CC 0
SR 3
SR 0
SR 3
SR 2
when BFCON.EBSE0 = 0 (or BFCON.EBSE1 = 0).
123
Min.
Values
Typ.
–
–
–
–
–
–
–
–
1)
Max.
5
5
4
4
–
–
–
–
Electrical Parameters
t
22
is increased by:
Unit Note /
ns
ns
ns
ns
ns
ns
ns
ns
V1.0, 2008-04
Test Con
dition
–
–
–
–
–
–
–
–
TC1796