LT6203CS8#PBF Linear Technology, LT6203CS8#PBF Datasheet - Page 15

IC OPAMP R-R INOUT DUAL LP 8SOIC

LT6203CS8#PBF

Manufacturer Part Number
LT6203CS8#PBF
Description
IC OPAMP R-R INOUT DUAL LP 8SOIC
Manufacturer
Linear Technology
Type
General Purpose Amplifierr
Datasheet

Specifications of LT6203CS8#PBF

Amplifier Type
General Purpose
Number Of Circuits
2
Output Type
Rail-to-Rail
Slew Rate
25 V/µs
Gain Bandwidth Product
100MHz
Current - Input Bias
3.8µA
Voltage - Input Offset
2600µV
Current - Supply
2.8mA
Current - Output / Channel
40mA
Voltage - Supply, Single/dual (±)
2.5 V ~ 12.6 V, ±1.25 V ~ 6.3 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Rail/rail I/o Type
Rail to Rail Input/Output
Number Of Elements
2
Unity Gain Bandwidth Product
90MHz
Common Mode Rejection Ratio
60dB
Input Offset Voltage
2mV
Input Bias Current
2.5uA
Single Supply Voltage (typ)
3/5/9/12V
Dual Supply Voltage (typ)
±3/±5V
Voltage Gain In Db
96.9dB
Power Supply Rejection Ratio
60dB
Power Supply Requirement
Single/Dual
Shut Down Feature
No
Single Supply Voltage (min)
2.5V
Single Supply Voltage (max)
12.6V
Dual Supply Voltage (min)
±1.25V
Dual Supply Voltage (max)
±6.3V
Technology
Bipolar
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Package Type
SOIC N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
Compliant

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Manufacturer
Quantity
Price
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LT6203CS8#PBFLT6203CS8
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APPLICATIONS INFORMATION
Amplifi er Characteristics
Figure 1 shows a simplifi ed schematic of the LT6202/
LT6203/LT6204, which has two input differential amplifi ers
in parallel that are biased on simultaneously when the
common mode voltage is at least 1.5V from either rail.
This topology allows the input stage to swing from the
positive supply voltage to the negative supply voltage.
As the common mode voltage swings beyond V
current source I
Feedback is maintained through the Q2/Q3 differential
amplifi er, but with an input g
effect occurs with I
swings within 1.5V of the negative rail. The effect of the
g
m
reduction is a shift in the V
DESD1
DESD3
1
+
saturates and current in Q1/Q4 is zero.
–V
–V
2
when the common mode voltage
+V
+V
D1
DESD2
DESD4
m
reduction of 1/2. A similar
OS
as I
D2
1
or I
Q1
R3
R1
Q2
2
I
saturate.
1
Figure 1. Simplifi ed Schematic
CC
I
Q3
2
– 1.5V,
R2
Q4
R4
Input bias current normally fl ows out of the + and – inputs.
The magnitude of this current increases when the input
common mode voltage is within 1.5V of the negative rail,
and only Q1/Q4 are active. The polarity of this current
reverses when the input common mode voltage is within
1.5V of the positive rail and only Q2/Q3 are active.
The second stage is a folded cascode and current mirror
that converts the input stage differential signals to a
single ended output. Capacitor C1 reduces the unity cross
frequency and improves the frequency stability without
degrading the gain bandwidth of the amplifi er. The
differential drive generator supplies current to the output
transistors that swing from rail-to-rail.
Q8
Q5
C1
R5
D3
+V
Q9
LT6202/LT6203/LT6204
Q7
Q6
+
C
DIFFERENTIAL
GENERATOR
M
V
DRIVE
BIAS
Q11
Q10
V –
V
–V
+
+V
DESD6
6203/04 F01
DESD5
15
620234fb

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