OP270EZ Analog Devices Inc, OP270EZ Datasheet - Page 20

• Manufacturer Part Number: OP270EZ
• Description: IC OPAMP GP 5MHZ DUAL PREC 8CDIP
• Manufacturer: Analog Devices Inc

Specifications of OP270EZ

• Slew Rate: 2.4 V/µs
• Rohs Status: RoHS non-compliant
• Amplifier Type: General Purpose
• Number Of Circuits: 2
• Gain Bandwidth Product: 5MHz
• Current - Input Bias: 5nA
• Voltage - Input Offset: 10µV
• Current - Supply: 4mA
• Voltage - Supply, Single/dual (±): ±4.5 V ~ 18 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 8-CDIP (0.300", 7.62mm)
• Op Amp Type: Low Noise
• No. Of Amplifiers: 2
• Bandwidth: 5MHz
• Supply Voltage Range: ± 4.5V To ± 18V
• Amplifier Case Style: DIP
• No. Of Pins: 8
• Channel Separation: 175
• Common Mode Rejection Ratio: 125
• Current, Input Bias: 5 nA
• Current, Input Offset: 1 nA
• Current, Supply: 4 mA
• Impedance, Thermal: 12 °C/W
• Number Of Amplifiers: Dual
• Package Type: CDIP-8
• Resistance, Input: 0.4 Megohms (Differential), 20 Gigaohms (Common-Mode)
• Temperature, Operating, Range: -40 to +85 °C
• Voltage, Gain: 2300 V/mV
• Voltage, Input: ±12.5 V
• Voltage, Noise: 3.6 nV/sqrt Hz
• Voltage, Offset: 10 μV
• Voltage, Output, High: +13.5 V
• Voltage, Output, Low: -13.5 V
• Voltage, Supply: ±15 V
• Output Type: -
• Current - Output / Channel: -
• -3db Bandwidth: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

OP270
ORDERING GUIDE
Model
OP270EZ
OP270FZ
OP270GP
OP270GPZ
OP270GS
OP270GS-REEL
OP270GSZ
OP270GSZ-REEL
1
2
©2001–2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
θ
printed circuit board for SOIC package.
Z = RoHS Compliant Part.
JA
is specified for worst-case mounting conditions, that is, θ
2
2
2
T
V
75
150
250
250
A
OS
= +25°C
Max (μV)
COPLANARITY
0.30 (0.0118)
0.10 (0.0039)
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
θ
(°C/W)
12
12
37
27
D00325-0-2/10(E)
JC
Figure 50. 16-Lead Standard Small Outline Package [SOIC_W]
16
1
10.50 (0.4134)
10.10 (0.3976)
0.51 (0.0201)
0.31 (0.0122)
1.27 (0.0500)
COMPLIANT TO JEDEC STANDARDS MS-013- AA
Dimensions shown in millimeters and (inches)
θ
(°C/W)
134
134
96
92
JA
BSC
JA
is specified for device in socket for CERDIP and PDIP packages; θ
1
9
8
Rev. E | Page 20 of 20
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
7.60 (0.2992)
7.40 (0.2913)
SEATING
PLANE
2.65 (0.1043)
2.35 (0.0925)
Wide Body
(RW-16)
S-Suffix
10.65 (0.4193)
10.00 (0.3937)
0.33 (0.0130)
0.20 (0.0079)
8°
0°
Package Description
16-Lead SOIC_W
16-Lead SOIC_W
8-Lead CERDIP
8-Lead CERDIP
8-Lead PDIP
8-Lead PDIP
16-Lead SOIC_W
16-Lead SOIC_W
1.27 (0.0500)
0.40 (0.0157)
45°
JA
is specified for device soldered to
Package
Option
Q-8 (Z-Suffix)
Q-8 (Z-Suffix)
N-8 (P-Suffix)
N-8 (P-Suffix)
RW-16 (S-Suffix)
RW-16 (S-Suffix)
RW-16 (S-Suffix)
RW-16 (S-Suffix)