MCP6V06-E/SN Microchip Technology, MCP6V06-E/SN Datasheet - Page 24

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MCP6V06-E/SN

Manufacturer Part Number
MCP6V06-E/SN
Description
IC OPAMP AUTO-ZERO SNGL 8SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP6V06-E/SN

Slew Rate
0.5 V/µs
Amplifier Type
Chopper (Zero-Drift)
Number Of Circuits
1
Output Type
Rail-to-Rail
Gain Bandwidth Product
1.3MHz
Current - Input Bias
6pA
Voltage - Input Offset
3µV
Current - Supply
300µA
Current - Output / Channel
22mA
Voltage - Supply, Single/dual (±)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Op Amp Type
Unity Gain Stable
No. Of Amplifiers
1
Bandwidth
1.3MHz
Supply Voltage Range
1.8V To 5.5V
Amplifier Case Style
SOIC
No. Of Pins
8
Number Of Channels
1
Voltage Gain Db
158 dB
Common Mode Rejection Ratio (min)
120 dB
Input Offset Voltage
0.003 mV
Operating Supply Voltage
3 V, 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP6V06-E/SN
Manufacturer:
MICROCHIP
Quantity:
12 000
MCP6V06/7/8
4.3.8.2
Figure 4-9
inverting gain amplifier circuits on one schematic.
Usually, to minimize the input bias current related off-
set, R
The guard traces (with ground vias at the ends) help
minimize the thermal gradients. The resistor layout
cancels the resistor thermal voltages, assuming the
temperature gradient is constant near the resistors:
EQUATION 4-2:
FIGURE 4-9:
for Single Non-inverting and Inverting Amplifiers.
DS22093A-page 24
Where:
Note:
V
V
G
G
1
M
P
M
P
is chosen to be R
V
V
shows the recommended non-inverting and
=
=
M
P
Changing the orientation of the resistors
will usually cause a significant decrease in
the cancellation of the thermal voltages.
V
MCP6V06
Non-inverting and Inverting Amplifier
Layout for Thermo-junctions
OUT
R
1 + G
magnitude
V
R3
R2
R1
OS
3
/R
R
R
≈ -V
≈ V
1
2
is neglected
2
M
U
, inverting gain magnitude
P
, non-inverting gain
PCB Layout and Schematic
1
M
G
G
2
P
||R
,
M
, V
R
3
.
3
V
U1
M
P
= GND
= GND
V
OUT
V
OUT
4.3.8.3
Figure 4-10
fier circuit. Usually, we choose R
The guard traces (with ground vias at the ends) help
minimize the thermal gradients. The resistor layout
cancels the resistor thermal voltages, assuming the
temperature gradient is constant near the resistors:
EQUATION 4-3:
FIGURE 4-10:
for Single Difference Amplifier.
Where:
Thermal voltages are approximately equal
Note:
V
G
V
M
P
DM
V
V
M
P
Changing the orientation of the resistors
will usually cause a significant decrease in
the cancellation of the thermal voltages.
shows the recommended difference ampli-
V
V
=
MCP6V06
Difference Amplifier Layout for
Thermo-junctions
OUT
OUT
R4
R2
R1
R3
R
V
≈ V
≈ V
R
R
OS
3
1
2
/R
U
REF
REF
is neglected
1
PCB Layout and Schematic
1
© 2008 Microchip Technology Inc.
= R
+ (V
+ (V
4
R
R
/R
4
3
P
P
U1
2
– V
– V
, difference gain
1
= R
M
M
V
)G
)G
2
REF
DM
DM
V
and R
OUT
V
V
3
OUT
REF
= R
4
.

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