AD8556ARZ Analog Devices Inc, AD8556ARZ Datasheet - Page 19

• Manufacturer Part Number: AD8556ARZ
• Description: IC AMP CHOPPER 2MHZ 10MA 8SOIC
• Manufacturer: Analog Devices Inc
• Series: DigiTrim®r
• Type: Instrumentation Amplifierr

Specifications of AD8556ARZ

• Operating Temperature: -40°C ~ 140°C
• Amplifier Type: Chopper (Zero-Drift)
• Number Of Circuits: 1
• Slew Rate: 1.2 V/µs
• Gain Bandwidth Product: 2MHz
• Current - Input Bias: 49nA
• Voltage - Input Offset: 2µV
• Current - Supply: 2mA
• Current - Output / Channel: 10mA
• Voltage - Supply, Single/dual (±): 4.5 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• No. Of Amplifiers: 1
• Bandwidth: 700kHz
• Rail To Rail I/o Type: Rail-Rail I/O
• No. Of Channels: 1
• Supply Voltage Range: 2.7V To 5.5V
• Amplifier Case Style: SOIC
• No. Of Pins: 8
• Number Of Channels: 1
• Number Of Elements: 5
• Power Supply Requirement: Single
• Common Mode Rejection Ratio: 80dB
• Unity Gain Bandwidth Product (typ): 8MHz
• Single Supply Voltage (typ): 5V
• Dual Supply Voltage (typ): Not RequiredV
• Power Supply Rejection Ratio: 109dB
• Rail/rail I/o Type: Rail to Rail Input/Output
• Single Supply Voltage (min): 4.5V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 140C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: SOIC N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Compliant

Table 9. Timing Specifications
Timing Parameter
t
t
t
Table 10. 38-Bit Serial Word Format
Field No.
0
1
2
3
4
5
A 38-bit serial word is used, divided into 6 fields. Assuming
each bit can be loaded in 60 μs, the 38-bit serial word transfers
in 2.3 ms. Table 10 summarizes the word format.
Field 0 and Field 5 are the start-of-packet field and end-of-
packet field, respectively. Matching the start-of-packet field with
1000 0000 0001 and the end-of-packet field with 0111 1111
1110 ensures that the serial word is valid and enables decoding
of the other fields.
w0
w1
ws
WAVEFORM
CODE
t
Bits
0 to 11
12 to 13
14 to 15
16 to 17
18 to 25
26 to 37
W0
0
t
WS
Description
Pulse width for loading 0 into shift register
Pulse width for loading 1 into shift register
Width between pulses
t
W1
1
2-Bit Function
00: Change Sense Current
01: Simulate Parameter Value
10: Program Parameter Value
11: Read Parameter Value
2-Bit Parameter
00: Second Stage Gain Code
01: First Stage Gain Code
10: Output Offset Code
11: Other Functions
8-Bit Value
Parameter 00 (Second Stage Gain Code): 3 LSBs Used
Parameter 01 (First Stage Gain Code): 7 LSBs Used
Parameter 10 (Output Offset Code): All 8 Bits Used
Parameter 11 (Other Functions)
Bit 0 (LSB): Master Fuse
Bit 1: Fuse for Production Test at Analog Devices
Bit 2: Parity Fuse
Description
12-Bit Start of Packet 1000 0000 0001
2-Bit Dummy 10
12-Bit End of Packet 0111 1111 1110
Figure 49. Timing Diagram for Code 010011
t
WS
t
W0
0
Rev. A | Page 19 of 28
t
WS
t
W0
0
t
WS
Field 3 breaks up the data and ensures that no data combination
can inadvertently trigger the start-of-packet and end-of-packet
fields. Field 0 should be written first and Field 5 written last.
Within each field, the MSB must be written first and the LSB
written last. The shift register features power-on reset to minimize
the risk of inadvertent programming; power-on reset occurs
when VDD is between 0.7 V and 2.2 V.
t
W1
1
t
WS
Specification
Between 50 ns and 10 μs
≥50 μs
≥10 μs
t
W1
1
AD8556