EL5421CYZ Intersil, EL5421CYZ Datasheet
EL5421CYZ
Specifications of EL5421CYZ
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EL5421CYZ Summary of contents
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... EL5421CY-T13* EL5421CYZ (Note) EL5421CYZ-T7* (Note) EL5421CYZ-T13* (Note) *Please refer to TB347 for details on reel specifications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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... Channel Separation 2 EL5421 Thermal Information = +25°C) Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C - -0.5V +0.5V Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85° Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp - = -5V 10kΩ and C = 10pF to 0V CONDITION (Note -4.5V ≤ ...
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Electrical Specifications +5V PARAMETER DESCRIPTION INPUT CHARACTERISTICS V Input Offset Voltage OS TCV Average Offset Voltage Drift OS I Input Bias Current B R Input Impedance IN C Input Capacitance IN A Voltage Gain V ...
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Electrical Specifications +15V PARAMETER DESCRIPTION INPUT CHARACTERISTICS V Input Offset Voltage OS TCV Average Offset Voltage Drift OS I Input Bias Current B R Input Impedance IN C Input Capacitance IN A Voltage Gain V ...
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Typical Performance Curves 1800 V =±5V S 1600 T =25°C A 1400 1200 1000 800 600 400 200 0 INPUT OFFSET VOLTAGE (mV) FIGURE 1. INPUT OFFSET VOLTAGE DISTRIBUTION 10 V =± - TEMPERATURE ...
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Typical Performance Curves V =±5V S 1.0005 1.0000 0.9995 - TEMPERATURE (°C) FIGURE 7. VOLTAGE GAIN vs TEMPERATURE V =±5V S 0.55 0.5 0.45 - TEMPERATURE (°C) FIGURE 9. SUPPLY CURRENT PER CHANNEL vs TEMPERATURE 5 ...
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Typical Performance Curves 200 T =25° =±5V S 160 120 10K 100K FREQUENCY (Hz) FIGURE 13. OUT PUT IMPEDANCE vs FREQUENCY 80 PSRR+ PSRR =25° =± 100 ...
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Typical Performance Curves V =± =10kΩ =±50mV IN T =25° 100 LOAD CAPACITANCE (pF) FIGURE 19. SMALL SIGNAL OVERSHOOT vs LOAD CAPACITANCE 1V 1µs V =± =25°C ...
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Pin Descriptions PIN NUMBER PIN NAME 1 VOUTA Buffer A Output 2 VINA Buffer A Input 3 VS+ Positive Power Supply 4 VINB Buffer B Input 5 VOUTB Buffer B Output 6 VOUTC Buffer C Output 7 VINC Buffer C ...
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Maximum reliability is maintained if the output continuous current never exceeds ±30mA. This limit is set by the design of the internal metal interconnects. Output Phase Reversal The EL5421 ...
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JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 0.6 486mW 0.5 0.4 0.3 0.2 0 AMBIENT TEMPERATURE (°C) FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Unused Buffers It is recommended that any unused buffer ...
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Mini SO Package Family (MSOP) 0. SEATING PLANE b 0. LEADS L1 c SEE DETAIL "X" DETAIL X 12 EL5421 MDP0043 A MINI ...