CLC425AJE National Semiconductor, CLC425AJE Datasheet - Page 10

• Manufacturer Part Number: CLC425AJE
• Description: IC OP AMP LO NOISE WIDE 8-SOIC
• Manufacturer: National Semiconductor

Specifications of CLC425AJE

• Amplifier Type: Voltage Feedback
• Number Of Circuits: 1
• Slew Rate: 350 V/µs
• Gain Bandwidth Product: 1.9GHz
• -3db Bandwidth: 95MHz
• Current - Input Bias: 12µA
• Voltage - Input Offset: 100µV
• Current - Supply: 15mA
• Current - Output / Channel: 90mA
• Voltage - Supply, Single/dual (±): 5 V ~ 12 V, ±2.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Output Type: -
• Other names: *CLC425AJE

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associated with each of the external resistors. Equation 1
provides the general form for total equivalent input voltage
noise density (e
1 that assumes
R
the equivalent noise model using this assumption. Figure 5 is
a plot of e
all of the contributing voltage noise source of Equation 2
shown. This plot gives the expected e
which assumes R
total equivalent output voltage noise (e
As seen in Figure 5, e
noise (e
below 33.5Ω. Between 33.5Ω and 6.43kΩ, e
by the thermal noise (e
Above 6.43kΩ, e
noise (
noise and current noise contribute equally occurs for
R
a gain of +20V/V giving a -3dB of 90MHz and driven from an
R
noise voltage (e
f
seq
seq
R
=464Ω (i.e., e
=25Ω, the CLC425 produces a total equivalent input
g
FIGURE 3. Non-inverting Amplifier Noise Model
=R
seq
FIGURE 4. Noise Model with R
n
) of the amplifier for equivalent source resistances
ni
2i
for bias current cancellation. Figure 4 illustrates
against equivalent source resistance (R
n
R
seq
ni
ni
). Equation 2 is a simplification of Equation
). The point at which the CLC425's voltage
f
ni
×
n
R
/
is dominated by the amplifier's current
g
=R
ni
t
=
2i
1.57*90MHz) of 16.5µV
seq
is dominated by the intrinsic voltage
n
). As an example, configured with
for bias current cancellation. The
4kTR
seq
12708 Version 11 Revision 3
) of the external resistor.
n0
ni
) is e
f
for a given (R
R
g
ni
ni
= R
*A
rms
is dominated
v
seq
.
.
1270832
1270835
seq
) with
seq
(1)
(2)
)
Print Date/Time: 2009/07/15 16:53:30
10
FIGURE 5. Voltage Noise Density vs. Source Resistance
If bias current cancellation is not a requirement, then R
does not need to equal R
tion 1, R
noise. Results similar to Equation 1 are obtained for the in-
verting configuration of Figure 2 if R
R
1 will yield an e
e
e
Noise Figure
Noise Figure (NF) is a measure of the noise degradation
caused by an amplifier.
The Noise Figure formula is shown in Equation 3. The addition
of a terminating resistor R
noise but increases the resulting NF. The NF is increased
because R
the input SNR.
The noise figure is related to the equivalent source resistance
(R
noise figure, the following steps are recommended:
•
•
R
and is approximated by:
R
Figure 6 is a plot of NF vs R
NF curves for both Unterminated and Terminated systems
are shown. The Terminated curve assumes R
indicates the NF for various source resistances including
R
ni
ni
g
OPT
OPT
s
seq
=R
to the inverting input is easily accomplished by multiplying
by the ratio of non-inverting to inverting gains.
is replaced by R
Minimize R
Choose the Optimum R
) and the parallel combination of R
OPT
is the point at which the NF curve reaches a minimum
≊
e
f
n
R
.
/i
g
n
T
should be as low as possible in order to minimize
reduces the input signal amplitude thus reducing
f
ni
R
referred to the non-inverting input. Referring
g
g
+R
s
. With these substitutions, Equation
seq
S
. In this case, according to Equa-
T
, reduces the external thermal
(
s
OPT
with R
)
seq
f
R
is replaced by R
f
g
and R
=9.09(A
s
=R
g
1270836
. To minimize
v
T
=+10). The
. The table
b
and
f
(3)
(4)
R
g