CLC425AJE National Semiconductor, CLC425AJE Datasheet - Page 9

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CLC425AJE

Manufacturer Part Number
CLC425AJE
Description
IC OP AMP LO NOISE WIDE 8-SOIC
Manufacturer
National Semiconductor
Datasheet

Specifications of CLC425AJE

Amplifier Type
Voltage Feedback
Number Of Circuits
1
Slew Rate
350 V/µs
Gain Bandwidth Product
1.9GHz
-3db Bandwidth
95MHz
Current - Input Bias
12µA
Voltage - Input Offset
100µV
Current - Supply
15mA
Current - Output / Channel
90mA
Voltage - Supply, Single/dual (±)
5 V ~ 12 V, ±2.5 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Output Type
-
Other names
*CLC425AJE

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Application Division
Introduction
The CLC425 is a very wide gain bandwidth, ultra low noise
voltage feedback operational amplifier which enables appli-
cation areas such as medical diagnostic ultrasound, magnetic
tape & disk storage and fiber-optics to achieve maximum high
frequency signal-to-noise ratios. The set of characteristic
plots located in the “Typical Performance” section illustrates
many of the performance trade offs. The following discussion
will enable the proper selection of external components in or-
der to achieve optimum device performance.
Bias Current Cancellation
In order to cancel the bias current errors of the non-inverting
configuration, the parallel combination of the gain setting
(R
source resistance (R
this constraint with the non-inverting gain equation also seen
in Figure 1, allows both R
from the following equations:
R
f
g
= A
) and feedback (R
FIGURE 1. Non-Inverting Amplifier Configuration
V
R
seq
and R
g
= R
seq
f
) resistors should equal the equivalent
CMRR and PSRR
f
) as defined in Figure 1. Combining
/(A
f
and R
V
−1).
g
to be determined explicitly
12708 Version 11 Revision 3
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Print Date/Time: 2009/07/15 16:53:30
9
When driven from a 0Ω source, such as that from the output
of an op amp, the non-inverting input of the CLC425 should
be isolated with at least a 25Ω series resistor.
As seen in Figure 2, bias current cancellation is accomplished
for the inverting configuration by placing a resistor (R
non-inverting input equal in value to the resistance seen by
the inverting input (R
less than 25Ω for best CLC425 performance. The additional
noise contribution of R
a shunt capacitor.
Total Input Noise vs. Source Resistance
In order to determine maximum signal-to-noise ratios from the
CLC425, an understanding of the interaction between the
amplifier's intrinsic noise sources and the noise arising from
its external resistors is necessary.
Figure 3 describes the noise model for the non-inverting am-
plifier configuration showing all noise sources. In addition to
the intrinsic input voltage noise (e
+
(e
= i
t
=
n−
) sources, there also exists thermal voltage noise
FIGURE 2. Inverting Amplifier Configuration
4kTR)
Typical DC Errors vs. Temperature
f
(R
b
can be minimized through the use of
g
+
s
)). R
b
n
is recommended to be no
) and current noise (i
www.national.com
1270830
1270834
b
) on the
n
= i
n

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