CLC425AJE National Semiconductor, CLC425AJE Datasheet - Page 13

• Manufacturer Part Number: CLC425AJE
• Description: IC OP AMP LO NOISE WIDE 8-SOIC
• Manufacturer: National Semiconductor

Specifications of CLC425AJE

• Amplifier Type: Voltage Feedback
• Number Of Circuits: 1
• Slew Rate: 350 V/µs
• Gain Bandwidth Product: 1.9GHz
• -3db Bandwidth: 95MHz
• Current - Input Bias: 12µA
• Voltage - Input Offset: 100µV
• Current - Supply: 15mA
• Current - Output / Channel: 90mA
• Voltage - Supply, Single/dual (±): 5 V ~ 12 V, ±2.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Output Type: -
• Other names: *CLC425AJE

Low Noise Magnetic Media Equalizer
The CLC425 implements a high-performance low noise
equalizer for such applications as magnetic tape channels as
shown in Figure 17. The circuit combines an integrator with a
bandpass filter to produce the low noise equalization. The
circuit's simulated frequency response is illustrated in Figure
18.
FIGURE 17. Low Noise Magnetic Media Equalizer
FIGURE 16. Sallen-Key Active Filter Topology
FIGURE 18. Equalizer Frequency Response
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Low-Noise Phase-Locked Loop Filter
The CLC425 is extremely useful as a Phase-Locked Loop fil-
ter in such applications as frequency synthesizers and data
synchronizers. The circuit of Figure 19 implements one pos-
sible PLL filter with the CLC425.
Decreasing the Input Noise Voltage
The input noise voltage of the CLC425 can be reduced from
its already low 1.05nV/
current. Using a 50kΩ resistor to ground on pin 8, as shown
in the circuit of Figure 14, will increase the quiescent current
to
<0.95nV/
Printed Circuit Board Layout
Generally, a good high-frequency layout will keep power sup-
ply and ground traces away from the inverting input and
output pins. Parasitic capacitances on these nodes to ground
will cause frequency response peaking and possible circuit
oscillation, see OA-15 for more information. National sug-
gests
CLC730068-SOT evaluation board as a guide for high fre-
quency layout and as an aid in device testing and character-
ization.
≈
17mA and reduce the input noise voltage to
the
FIGURE 19. Phase-Locked Loop Filter
CLC730013-DIP,
by slightly increasing the supply
CLC730027-SOIC,
1270857
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or