CLC5523IM National Semiconductor, CLC5523IM Datasheet - Page 10

• Manufacturer Part Number: CLC5523IM
• Description: IC AMP VARIABLE GAIN 8-SOIC
• Manufacturer: National Semiconductor

Specifications of CLC5523IM

• Amplifier Type: Variable Gain
• Number Of Circuits: 1
• Slew Rate: 1800 V/µs
• -3db Bandwidth: 250MHz
• Current - Input Bias: 3µA
• Current - Supply: 13.5mA
• Current - Output / Channel: 80mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Output Type: -
• Voltage - Supply, Single/dual (±): -
• Gain Bandwidth Product: -
• Voltage - Input Offset: -
• Other names: *CLC5523IM

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CLC5523 Operation
The key features of the CLC5523 are:
The CLC5523 combines a closed loop input buffer, a voltage
controlled variable gain cell and an output amplifier. The
input buffer is a transconductance stage whose gain is set by
the gain setting resistor, R
feedback op amp and is configured as a transimpedance
stage whose gain is set by, and equal to, the feedback
resistor, R
defined by the ratio; R
adjusted over its 0 to 2V range, the gain is adjusted over a
range of 80dB relative to the maximum set gain.
Setting the CLC5523 Maximum Gain
Although the CLC5523 is specified at A
ommended A
are possible but usually impractical due to output offsets,
noise and distortion. When varying A
are made:
The amount of current which the input buffer can source into
R
the maximum input voltage:
The effects of maximum input range on harmonic distortion
are illustrated in the Input Harmonic Distortion plot. Varia-
tions in R
bandwidth due to its loading of the input buffer and can be
seen in Frequency Response vs. R
a more dramatic effect on the small signal bandwidth. The
output amplifier of the CLC5523 is a current feedback am-
plifier (CFA) and its bandwidth is determined by R
any CFA, doubling the feedback resistor will roughly cut the
bandwidth of the device in half (refer to the plot Frequency
Response vs. R
there is a basic tutorial, OA-20, Current Feedback Myths
Debunked or a more rigorous analysis, OA-13, Current
Feedback Amplifier Loop Gain Analysis and Performance
Enhancements.
Using the CLC5523 in AGC Application
In AGC applications, the control loop forces the CLC5523 to
have a fixed output amplitude. The input amplitude will vary
over a wide range and this can be the issue that limits
dynamic range. At high input amplitudes, the distortion due
to the input buffer driving R
produced by the output amplifier driving the load. In the plot,
Harmonic Distortion vs. Gain, second and third harmonic
distortion are plotted over a gain range of nearly 40dB for a
fixed output amplitude of 100mV
• Low Power
• Broad voltage controlled gain and attenuation range
• Bandwidth independent, resistor programmable gain
• Broad signal and gain control bandwidths
• Frequency response may be adjusted with R
• High Impedance signal and gain control inputs
g
R
R
V
is limited and is specified in the I
range
g
f
: determines overall bandwidth
IN
: determines the input voltage range
(max) = I
f
g
. The maximum gain, A
will also have an effect on the small signal
vmax
R g
f
). For more information covering CFA’s,
max x R
varies between 2 and 100. Higher gains
f
/R
g
g
g
. As the gain control input (V
. The output amplifier is a current
g
pp
may exceed that which is
in specified configuration,
g
R g
vmax
. Changes in R
max R
vmax
, of the CLC5523 is
vmax
several tradeoffs
g
spec. This sets
= 10, the rec-
f
f
f
will have
. As with
g
) is
10
R
40dB down from A
and we can see the distortion is at its worst at this gain. If the
output amplitude of the AGC were to be raised above
100mV, the input amplitudes for gains 40dB down from
A
grade further. It is for this reason that we recommend lower
output amplitude if wide gain range are desired. Using a
post-amp like the CLC404 or CLC409 would be the best way
to preserve dynamic range and yield output amplitudes
much higher than 100mV
Another way of addressing distortion performance and its
limitations on dynamic range, would be to raise the value of
R
the load resistance, and therefore decreasing the demand
load current, the distortion performance will be improved in
most cases. With an increased R
increased to keep the same A
overall bandwidth.
Gain Partitioning
If high levels of gain are needed, gain partitioning should be
considered.
The maximum gain range for this circuit is given by the
following equation:
The CLC425 is a low noise wideband voltage feedback
amplifier. Setting R2 at 909
gain of 20dB. Setting R
at 50 , produces a gain of 26dB in the CLC5523. The total
gain of this circuit is therefore approximately 46dB. It is
important to understand that when partitioning to obtain high
levels of gain, very small signal levels will drive the amplifiers
to full scale output. For example, with 46dB of gain a 20mV
signal at the input will drive the output of the CLC425 to
200mV, the output of the CLC5523 to 4V. Accordingly, the
designer must carefully consider the contributions of each
stage to the overall characteristics. Through gain partitioning
the designer is provided with an opportunity to optimize the
frequency response, noise, distortion, settling time, and
loading effects of each amplifier to achieve improved overall
performance.
CLC5523 Gain Control Range and Minimum Gain
Before discussing Gain Control Range, it is important to
understand the issues which limit it. The minimum gain of the
CLC5523, theoretically, is zero, but in practical circuits is
limited by the amount of feedthrough, here defined as the
vmax
f
g
. Just like any other high speed amplifier, by increasing
= 1k, R
would be even higher and the distortion would de-
g
= 100 . When the gain is adjusted to 0.1 (i.e.,
FIGURE 1. Gain Partitioning
vmax
), the input amplitude would be 1V
f
at 1000
pp
.
vmax
and R1 at 100
g
and this will decrease the
as recommended and R
, R
f
will also have to be
produces a
DS012798-31
pp
g