AK4382AVT AKM Semiconductor Inc, AK4382AVT Datasheet - Page 17
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AK4382AVT
Manufacturer Part Number
AK4382AVT
Description
IC DAC 24BIT DIFF 16TSSOP
Manufacturer
AKM Semiconductor Inc
Datasheet
1.AK4382AVT.pdf
(21 pages)
Specifications of AK4382AVT
Number Of Bits
24
Data Interface
Serial
Number Of Converters
2
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Settling Time
-
Other names
974-1009-2
AK4382AVT
AK4382AVT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AK4382AVT
Manufacturer:
AKM
Quantity:
20 000
Part Number:
AK4382AVT-E2
Manufacturer:
AKM
Quantity:
20 000
Company:
Part Number:
AK4382AVTP-E2
Manufacturer:
NUVOTON
Quantity:
149
ASAHI KASEI
n Register Definitions
MS0071-E-02
Addr
Addr
00H
01H
SLOW: Slow Roll-off Filter Enable
RSTN: Internal timing reset control
PW: Power down control
DIF2-0: Audio data interface formats (see Table 7)
ACKS: Master Clock Frequency Auto Setting Mode Enable
SMUTE: Soft Mute Enable
DEM1-0: De-emphasis Response (see Table 8)
DFS1-0: Sampling speed control
DZFE: Data Zero Detect Enable
Control 1
Control 2
default
default
Register Name
Register Name
0: Reset. All registers are not initialized.
1: Normal Operation
When MCLK frequency or DFS change s , the AK4382A should be reset by PDN pin or RSTN bit.
0: Power down . All registers are not initialized.
1: Normal Operation
Initial: “010”, Mode 2
0: Disable, Manual Setting Mode
1: Enable, Auto Setting Mode
Master clock frequency is detected a utomatically at ACKS bit “ 1”. In this case, the setting of DFS1-0 are
ignored. When this bit is “0”, DFS1-0 set the sampling speed mode.
0: Normal operation
1: DAC outputs soft-muted
Initial: “01”, OFF
00: Normal speed
01: Double speed
10: Quad speed
When changing between Normal/Double Speed Mode and Quad Speed Mode, some click noise occurs.
0: Sharp Roll-off Filter
1: Slow Roll -off Filter
0: Disable
1: Enable
Zero detect function can be disabled by DZFE bit “0”. In this case, the DZF pins of both channels are
always “L”.
ACKS
DZFE
D7
D7
1
0
DZFM
D6
D6
0
0
0
SLOW
D5
D5
0
0
0
- 17 -
DFS1
DIF2
D4
D4
0
0
DFS0
DIF1
D3
D3
1
0
DEM1
DIF0
D2
D2
0
0
DEM0
PW
D1
D1
1
1
[AK4382A]
SMUTE
RSTN
2002/12
D0
D0
1
0