DSP56321VL240 Freescale Semiconductor, DSP56321VL240 Datasheet - Page 9

IC DSP 24BIT 240MHZ 196-MAPBGA

DSP56321VL240

Manufacturer Part Number
DSP56321VL240
Description
IC DSP 24BIT 240MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheet

Specifications of DSP56321VL240

Interface
Host Interface, SSI, SCI
Clock Rate
240MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
576kB
Voltage - I/o
3.30V
Voltage - Core
1.60V
Operating Temperature
-40°C ~ 100°C
Mounting Type
*
Package / Case
196-MAPBGA
Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
240MHz
Mips
240
Device Input Clock Speed
240MHz
Ram Size
576KB
Operating Supply Voltage (typ)
1.6/3.3V
Operating Supply Voltage (min)
1.5/3/3/3/3/3/3V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSP56321VL240
Manufacturer:
FREESCALE
Quantity:
453
Part Number:
DSP56321VL240
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1.1 Power
1.2 Ground
1.3 Clock
Freescale Semiconductor
V
V
V
V
V
V
V
Note: The user must provide adequate external decoupling capacitors for all power connections.
GND
Note: The user must provide adequate external decoupling capacitors for all GND connections.
EXTAL
XTAL
Power Name
Signal Name
CCQL
CCQH
CCA
CCD
CCC
CCH
CCS
Name
Quiet Core (Low) Power—An isolated power for the core processing and clock logic. This input must be isolated
externally from all other chip power inputs.
Quiet External (High) Power—A quiet power source for I/O lines. This input must be tied externally to all other chip
power inputs , except V
Address Bus Power—An isolated power for sections of the address bus I/O drivers. This input must be tied externally
to all other chip power inputs, except V
Data Bus Power—An isolated power for sections of the data bus I/O drivers. This input must be tied externally to all
other chip power inputs, except V
Bus Control Power—An isolated power for the bus control I/O drivers. This input must be tied externally to all other
chip power inputs, except V
Host Power—An isolated power for the HI08 I/O drivers. This input must be tied externally to all other chip power
inputs, except V
ESSI, SCI, and Timer Power—An isolated power for the ESSI, SCI, and timer I/O drivers. This input must be tied
externally to all other chip power inputs, except V
Ground—Connected to an internal device ground plane.
Input
Output
Type
CCQL
Input
Chip-driven
.
State During
CCQL
Reset
CCQL
.
DSP56321 Technical Data, Rev. 11
Table 1-4.
Table 1-2.
.
CCQL
Table 1-3.
.
CCQL
External Clock/Crystal Input—Interfaces the internal crystal oscillator input
to an external crystal or an external clock.
Crystal Output—Connects the internal crystal oscillator output to an external
crystal. If an external clock is used, leave XTAL unconnected.
.
Clock Signals
CCQL
Power Inputs
Grounds
Description
Description
.
Signal Description
Power
1-3

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