MSC7119VF1200 Freescale Semiconductor, MSC7119VF1200 Datasheet - Page 49

• Manufacturer Part Number: MSC7119VF1200
• Description: DSP 16BIT W/DDR CTRLR 400-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MSC711x StarCorer
• Type: Fixed Pointr

Specifications of MSC7119VF1200

• Interface: Host Interface, I²C, UART
• Clock Rate: 300MHz
• Non-volatile Memory: ROM (8 kB)
• On-chip Ram: 464kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: *
• Package / Case: 400-MAPBGA
• Device Core Size: 16b
• Clock Freq (max): 300MHz
• Mips: 300
• Device Input Clock Speed: 300MHz
• Ram Size: 256KB
• Operating Supply Voltage (typ): 1.2/2.5/3.3V
• Operating Supply Voltage (min): 1.14/2.38/3.14V
• Operating Supply Voltage (max): 1.26/2.63/3.47V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 400
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3.2.7
One of the most common ways to derive power is to use either a simple fixed or adjustable linear regulator. For the system I/O
voltage supply, a simple fixed 3.3 V supply can be used. However, a separate adjustable linear regulator supply for the core
voltage V
requirements.
3.3
The following equations permit estimated power usage to be calculated for individual design conditions. Overall power is
derived by totaling the power used by each of the major subsystems:
This equation combines dynamic and static power. Dynamic power is determined using the generic equation:
3.3.1
Estimation of core power is straightforward. It uses the generic dynamic power equation and assumes that the core load
capacitance is 750 pF, core voltage swing is 1.2 V, and the core frequency is 300 MHz. This yields:
This equation allows for adjustments to voltage and frequency if necessary.
Freescale Semiconductor
Core
Memory
Reference
I/O
where,
DDC
Supply
Estimated Power Usage Calculations
Power Supply Design
Core Power
should be implemented. For the memory power supply, regulators are available that take care of all DDR power
C = load capacitance in pF
V = peak-to-peak voltage swing in V
F = frequency in MHz
P
TOTAL
P
CORE
Table 33. Recommended Power Supply Ratings
= P
= 750 pF × (1.2 V)
CORE
Symbol
V
V
V
V
+ P
DDIO
DDM
DDC
REF
MSC7119 Data Sheet, Rev. 8
C × V
PERIPHERALS
2
× F × 10
2
× 300 MHz × 10
+ P
–3
DDRIO
mW
Nominal Voltage
+ P
–3
1.25 V
1.2 V
2.5 V
3.3 V
IO
= 324.0 mW
+ P
LEAKAGE
Hardware Design Considerations
Current Rating
10 µA per device
1.5 A per device
0.5 A per device
1.0 A per device
Eqn. 3
Eqn. 4
Eqn. 5
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