XR21V1414IM48-F Exar Corporation, XR21V1414IM48-F Datasheet - Page 27
![IC UART FIFO USB QUAD 48TQFP](/photos/13/94/139467/xr21v1414im48-f_sml.jpg)
XR21V1414IM48-F
Manufacturer Part Number
XR21V1414IM48-F
Description
IC UART FIFO USB QUAD 48TQFP
Manufacturer
Exar Corporation
Type
USB UARTsr
Datasheet
1.XR21V1414IM48-F.pdf
(32 pages)
Specifications of XR21V1414IM48-F
Package / Case
48-TQFP
Features
*
Number Of Channels
1, UART
Fifo's
128 Byte
Protocol
USB 2.0
Voltage - Supply
3.3V
With Auto Flow Control
Yes
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Current
16 mA
Operating Supply Voltage
2.97 V to 3.63 V
No. Of Channels
4
Data Rate
12Mbps
Uart Features
Automatic Hardware And Software Flow Control, Half-Duplex Mode, Fractional Baud Rate Generator
Supply Voltage Range
2.97V To 3.63V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
1016-1303 - EVAL BOARD FOR XR21V1414IM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
1016-1304
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XR21V1414IM48-F
Manufacturer:
EXAR
Quantity:
5 000
Company:
Part Number:
XR21V1414IM48-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XR21V1414IM48-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
REV. 1.1.0
This register enables the Wide mode functionality for the UART.
WIDE_MODE[0]: Enable wide mode
WIDE_MODE[7:1]: Reserved
These bits are reserved and should remain ’0’.
This register is automatically set to logic ’1’ for baud rates below 46921 bps, and can be manually set for baud
rates of 46921 bps and higher. This register enables the Low latency feature of the UART. Write to this
register following any desired baud rate setting change.
LOW_LATENCY[0]: Enable Low Latency mode
LOW_LATENCY[7:1]: Reserved
These bits are reserved and should remain ’0’.
This register is used to enable / disable GPIO status in the high data byte of the custom interrupt packet. See
Table 16, “Interrupt Packet Format,” on page 28 and Table 18, “Data Field of Customized Interrupt Packet -
Exar Vendor Specific,” on page 29.
CUSTOM_INT_PACKET[0]: GPIO1
CUSTOM_INT_PACKET[1]: GPIO2
CUSTOM_INT_PACKET[2]: Reserved
CUSTOM_INT_PACKET[3]: GPIO0
CUSTOM_INT_PACKET[4]: GPIO3
CUSTOM_INT_PACKET[5]: GPIO4
3.4.1
3.4.2
3.4.3
Logic 0 = Normal (7, 8 or 9 bit data) mode
Logic 1 = Wide mode - See
Wide Mode Receive” on page
Logic 0 = Receive data is not forwarded from the Rx FIFO until bMaxPacketSize (64 bytes) or timeout (3
characters) has occurred.
Logic 1 = All data in the RX FIFO is provided to the USB host at the next BULK IN request irrespective of the
number of bytes in the FIFO.
Logic 0 = Disable GPIO1 status in custom interrupt packet.
Logic 1 = Enable GPIO1 status in custom interrupt packet.
Logic 0 = Disable GPIO2 status in custom interrupt packet.
Logic 1 = Enable GPIO2 status in custom interrupt packet.
This bit is reserved and should remain ’0’.
Logic 0 = Disable GPIO0 status in custom interrupt packet.
Logic 1 = Enable GPIO0 status in custom interrupt packet.
Logic 0 = Disable GPIO3 status in custom interrupt packet.
Logic 1 = Enable GPIO3 status in custom interrupt packet.
WIDE_MODE Register Description (Read/Write)
LOW_LATENCY Register Description (Read/Write)
CUSTOM_INT_PACKET (Read/Write)
“Section 1.5.1.1, Wide Mode Transmit” on page 11
11.
27
4-CH FULL-SPEED USB UART
and
“Section 1.5.2.1,
XR21V1414