71M6532D-IGTR/F Maxim Integrated Products, 71M6532D-IGTR/F Datasheet - Page 78
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71M6532D-IGTR/F
Manufacturer Part Number
71M6532D-IGTR/F
Description
IC ENERGY METER 128KB 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.71M6531D-IMRF.pdf
(120 pages)
Specifications of 71M6532D-IGTR/F
Mounting Style
SMD/SMT
Package / Case
LQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
71M6532D-IGTR/F
Manufacturer:
Maxim Integrated
Quantity:
10 000
Data Sheet 71M6531D/F-71M6532D/F
78
COMP_STAT[0]
DI_RPB[2:0]
DIO_R1[2:0]
DIO_R2[2:0]
DIO_R4[2:0]
DIO_R5[2:0]
DIO_R6[2:0]
DIO_R7[2:0]
DIO_R8[2:0]
DIO_R9[2:0]
DIO_R10[2:0]
DIO_R11[2:0]
DIO_RRX[2:0]
DIO_DIR0[7:1]
DIO_DIR1[7:0]
DIO_DIR2[1]
DIO_0[7:0]
DIO_1[7:0]
DIO_2[1]
DIO_3[5:4]
DIO_EEX[1:0]
Name
SFR A2 [7:1]
2003[0]
2009[2:0]
2009[6:4]
200A[2:0]
200B[2:0]
200B[6:4]
200C[2:0]
200C[6:4]
200D[2:0]
200D[6:4]
200E[2:0]
200E[6:4]
20AF[2:0]
SFR 91
SFR A1[1]
SFR 80
SFR 90
SFR A0[1]
SFR B0[5:4]
2008[7:6]
Location
Reset
–
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Wake
–
0
0
0
0
0
0
0
0
0
0
0
0
–
–
–
−
–
–
–
0
© 2005-2010 TERIDIAN Semiconductor Corporation
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Dir
R
Status bit for the V1 comparator (same as V1_OK, see TMUXOUT)
Connects dedicated I/O pins DIO2 and DIO4 through DIO11 as well as input pins PB,
DIO1 and RX to internal resources. If more than one input is connected to the same
resource, the Multiple column in the table below specifies how they are combined.
Programs the direction of DIO pins 7 through 1. 1 indicates an output. The bits are
ignored if the pin is not configured as DIO. See DIO_PV and DIO_PW for special options
for DIO6 and DIO7. See DIO_EEX[1:0] for special options for DIO4 and DIO5.
Programs the direction of DIO pins 15 through 8. 1 indicates an output. The bits are
ignored if the pin is not configured as I/O. See DIO_PX and DIO_PW for special options
for the DIO8 and DIO9 outputs.
Programs the direction of DIO17.
The value on the DIO pins. Pins configured as LCD will read zero. When written, changes
data on pins configured as outputs. Pins configured as LCD or input will ignore writes.
When set, converts DIO4 and DIO5 to interface with external EEPROM. DIO4 becomes
SDCK and DIO5 becomes bi-directional SDATA.
DIO_Rx[2:0]
DIO_EEX[1:0]
DIO_0[7:1] corresponds to DIO7 through DIO1. PB is read on DIO_0[0].
DIO_1[7:0] corresponds to DIO15 through DIO8.
DIO_2[1] corresponds to DIO17.
DIO_3[5:4] corresponds to DIO28 and DIO29.
000
001
010
011
100
101
110
111
00
01
10
11
Resource
NONE
Reserved
T0 (Counter /Timer 0 clock or gate)
T1 (Counter /Timer 1 clock or gate)
High priority IO interrupt (int0 rising)
Low priority IO interrupt (int1 rising)
High priority IO interrupt (int0 fall-
ing)
Low priority IO interrupt (int1 falling)
Function
Disable EEPROM interface
2-Wire EEPROM interface
3-Wire EEPROM interface
not used
Description
Multiple
OR
OR
OR
OR
OR
OR
OR
–
FDS 6531/6532 005
v1.3