MGA-85563-BLKG Avago Technologies US Inc., MGA-85563-BLKG Datasheet - Page 9

• Manufacturer Part Number: MGA-85563-BLKG
• Description: AMP RFIC LNA GAAS 3V SOT-363
• Manufacturer: Avago Technologies US Inc.
• Type: General Purpose Amplifierr

Specifications of MGA-85563-BLKG

• P1db: 0.9dBm
• Noise Figure: 1.6dB
• Package / Case: SC-70-6, SC-88, SOT-363
• Current - Supply: 15mA ~ 20mA
• Frequency: 0Hz ~ 6GHz
• Gain: 18dB
• Rf Type: Cellular, PCS, WLAN
• Test Frequency: 2GHz
• Voltage - Supply: 2.7V ~ 3.6V
• Mounting Style: SMD/SMT
• Technology: Low Noise Amplifier
• Number Of Channels: 1
• Operating Frequency: 6000 MHz
• Operating Supply Voltage: 3 V
• Supply Current: 20 mA @ 3 V
• Manufacturer's Type: Low Noise Amplifier
• Frequency (max): 6GHz
• Operating Supply Voltage (typ): 3V
• Package Type: SOT-363
• Mounting: Surface Mount
• Pin Count: 6
• Noise Figure (typ): 1.6(Min)@6000MHzdB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 516-1957; MGA-85563-BLKG

PCB Materials
FR-4 or G-10 type materials are good choices for most
low cost wireless applications using single or multi-layer
printed circuit boards. Typical single-layer board thick-
ness is 0.020 to 0.031 inches. Circuit boards thicker than
0.031 inches are not recommended due to excessive
inductance in the ground vias.
For noise figure critical or higher frequency applications,
the additional cost of PTFE/glass dielectric materials may
be warranted to minimize transmission line loss at the
amplifier’s input.
Application Example
The printed circuit layout in Figure 19 can be used with
the MGA-85563 for frequencies from 800 MHz through 6
GHz. This layout is a microstripline design (solid ground-
plane on the backside of the circuit board) with 50 Ω in-
terfaces for the RF input and output. The circuit is fabri-
cated on 0.031-inch thick FR-4 dielectric material. Plated
through holes (vias) are used to bring the ground to the
top side of the circuit where needed. Multiple vias are
used to reduce the inductance of the paths to ground.
Figure 19. Multi-purpose PCB Layout.
1.9 GHz Design
To illustrate the simplicity of using the MGA-85563, a 1.9
GHz amplifier for PCS type receiver applications is present-
ed.
To achieve minimum noise figure, the 50 Ω input to the
amplifier is matched to *
Noise Parameters, the value of *
to be 0.56 ‘+33°. The conjugate of *
plotted on the Smith chart as Point A in Figure 20. The
addition of a 0.108 inch length (actual length on FR-4;
electrical length is 11.7° of 50 Ω transmission line (MLIN)
rotates Point A around to the R = 1 circle on the Smith
chart. A series 5.6 nH inductor (L1) is then all that is re-
quired to complete the match to 50 Ω.
9
MGA-85-A
IN
+V
R
d
bias
OUT
opt
. From the table of Typical
opt
at 1.9 GHz is found
opt
, 0.56 ‘-33°, is
-0.2
Figure 20. Input Impedance Match.
The output of the MGA-85563 is already well matched to
50 Ω and no additional matching is needed.
The resulting RF circuit is shown in Figure 21.
Input
Figure 21. Input Circuit for 1.9 GHz.
A schematic diagram of the complete 1.9 GHz circuit
with the input noise match and DC biasing is shown in
Figure 22.
Input
Figure 22. Schematic of 1.9 GHz Circuit.
DC bias is applied to the MGA-85563 through the RFC at
the RF Output pin. The power supply connection is by-
passed to ground with capacitor C3. Provision is made
for an additional bypass capacitor, C4, to be added to the
bias line near the +3 volt connection. C4 will not normal-
ly be needed unless several stages are cascaded using a
common power supply.
The optional resistor, R
crease device current to handle higher level signals. The
use of the bias-setting resistor will not affect the input
matching circuit.
0.2
RF
RF
C1
0.2
-0.5
5.6 nH
0.5
L1
C (50 Ω)
Input
R
RF
0.5
MLIN
b
0.108 in.
85
L1
C
50 Ω
Notes: L1 = 5.6 nH
-1
1
B
MLIN
A (Γ
RFC = 22 nH
C1 – C4 = 56 pH
MLIN = 0.108 inch, 50 Ω
(C1, C4 and R
b
2
C3
, may be added if desired to in-
B
opt
A
)
RFC
C2
2
-2
MGA-
85563
b
C4
are optional)
Outp
Output
V
RF
RF
d