ATA555814C-DDB Atmel, ATA555814C-DDB Datasheet - Page 14

• Manufacturer Part Number: ATA555814C-DDB
• Description: IC IDIC 1KBIT R/W DIE
• Manufacturer: Atmel

Specifications of ATA555814C-DDB

• Function: Read/Write
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4. CRC Error Checking
14
ATA5558
The CRC error checking circuitry generates a 16-bit CRC to ensure the integrity of transmitted
and received data packets. The ATA5558 uses the CRC-CCITT (Consultative Committee for
International Telegraph and Telephone) for error detection. The 16 bit cyclic redundancy code is
calculated using the following polynomial with an initial value of 0x0000:
The implemented version of the CRC check has the following characteristics:
Should a CRC be required, both the tag and interrogator must use the above CRC polynomial.
During read/write operations, a CRC can be attached to information by either the interrogator
and/or the tag
In the case of downlink communication, a CRC (CRC_d) can be attached to information trans-
mitted from the interrogator to the tag(s) (see
tag(s) to ensure correct transmission.
During the uplink phase of the read commands the tag replies with the requested data block(s)
followed by an uplink CRC (CRC_u). This CRC_u is generated in the tag’s CRC generator, from
the downlink address, CRC_d (if used) and the returned data (see
c). So by initializing the interrogator’s CRC generator with the same address and CRC_d (if
used), then subsequently updating it with the returned data and uplink CRC_u, the integrity of
both the address understood by the tag and data itself can be verified. On receiving a response
from the tag which includes a CRC_u, it is recommended that the interrogator verifies this. If it is
found to be incorrect, the interrogator should take the appropriate actions. These actions are left
to the discretion of the system designer.
During the anticollision detection, the CRC can also be used as a means of tag identification. A
tag which is successfully selected by one of the select commands or as the result of an anticolli-
sion elimination cycle, will always reply with a CRC. This is generated from it’s own Tag ID (see
Figure 4-3 on page 16
tional means of double checking whether the intended tag has been selected.
For any write command, if the bit 10 of the configuration register = 1, the usage of the CRC for
this communication is mandatory. Failure to include or verify a CRC results in the tag aborting
the command execution and returning an error code. If the configuration register bit 10 = 0, the
Write CRC usage is optional. In this case, the CRC is handled in the same manner as a read
command i.e. the CRC is only evaluated if attached. Should no CRC be transmitted and the con-
figuration register bit 10 = 0, then the command will always be executed.
P(X)
• Reverse CRC-CCITT 16 as described in ISO/IEC 11785
• The CRC 16-bit shift register is initialized to all zeros at the beginning of a command
• The incoming data bits are XOR-ed with the MSB of the CRC register and is shifted into the
• After all data bits have been processed, the CRC register contains the CRC-16 code.
• Reversibility - The original data together with associated CRC, when fed back into the same
register’s LSB
CRC generator will regenerate the initial value (all zero’s).
=
x
16
+
x
12
+
x
5
+
x
d) and is always preceded by an SOF pattern. This also provides an addi-
0
Figure 4-2 on page
15). This is evaluated by the
Figure 4-3 on page 16
4681E–RFID–11/09
a, b,