EM35X-BBRD Ember, EM35X-BBRD Datasheet - Page 61
EM35X-BBRD
Manufacturer Part Number
EM35X-BBRD
Description
EM35X BREAKOUT BOARD
Manufacturer
Ember
Datasheet
1.EM35X-DEV-UPG-IAR.pdf
(245 pages)
Specifications of EM35X-BBRD
Frequency
2.4GHz
For Use With/related Products
EM35x
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
636-1013
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7.9
7.10
Debug Control and Status
GPIO Signal Assignment Summary
In some cases, it may be useful to assign IRQC or IRQD to an input also in use by a peripheral, for example to
generate an interrupt from the slave select signal (nSSEL) in an SPI slave mode interface.
Refer to Chapter 11, Interrupt System, for further information regarding the EM35x interrupt system.
Two GPIO registers are largely concerned with debugger functions. GPIO_DBGCFG can disable debugger
operation, but has other miscellaneous control bits as well. GPIO_DBGSTAT, a read-only register, returns
status related to debugger activity (GPIO_FORCEDBG and GPIO_SWEN), as well a flag (GPIO_BOOTMODE)
indicating whether nBOOTMODE was asserted at the last power-on or nRESET-based reset.
The GPIO signal assignments are shown in Table 7-5.
GPIO_IRQxSEL
0
1
2
3
4
5
6
7
GPIO
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
Table 7-4. IRQC/D GPIO Selection
Final
GPIO_IRQxSEL
7-8
10
11
12
13
14
15
8
9
GPIO
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
EM351 / EM357
GPIO_IRQxSEL
16
17
18
19
20
21
22
23
120-035X-000G
GPIO
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
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