XE1205SKC433XE1 Semtech, XE1205SKC433XE1 Datasheet - Page 25

• Manufacturer Part Number: XE1205SKC433XE1
• Description: KIT STARTER FOR XE1205 433MHZ
• Manufacturer: Semtech
• Series: TrueRF™r
• Type: Transceiver, ISMr

Specifications of XE1205SKC433XE1

• Frequency: 433MHz
• For Use With/related Products: XE1205 (433MHz)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

7.1.1
The SPI_CONFIG interface is selected if NSS_CONFIG is low even if the circuit is in buffered mode and NSS_DATA is
low (SPI_CONFIG has priority). To configure the transceiver two bytes are required; the first byte contains a start bit
(equal to 0), R/W information (‘1’ for a read operation or ‘0’ for a write operation), 5 bits for the address of the register
and finally a stop bit (equal to ‘1’). The second byte contains the data to be sent in write mode or the new address to
read from in read mode. Figure 15
NSS_CONFIG must remain low during the transmission of the two bytes (address and data); if it goes high after the first
byte, then the next byte will be considered as an address byte. When writing more than one register successively,
NSS_CONFIG does not need to make a high to low transmission between two write sequences. The bytes are
alternatively considered as an address byte followed by a data byte.
The read sequence via the SPI_CONFIG interface is similar to the write one except that the data byte contains all zeroes
© Semtech 2008
SCK
MOSI
MISO
NSS_CONFIG
* when writing the new data at address A1,
the previous contents of A1 can be read by the micro-controller
Chip configuration via SPI_CONFIG interface
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Figure 15: Write sequence when sending a new configuration to the XE1205 via the SPI _CONFIG
start
x
1
rw
2
x
A(4) A(3) A(2) A(1)
3
x
Address = A1
shows the timing diagram for a typical write sequence:
4
x
5
x
6
x
A(0)
7
x
stop D(7) D(6) D(5) D(4) D(3) D(2) D(1) D(0)
8
x
25
D(7) D(6) D(5) D(4) D(3) D(2) D(1)
9
10
11
New value of
register A1*
12
Data at address
13
A1*
14
15
XE1205
16
D(0)
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