DR-TRC101-315-DK RFM, DR-TRC101-315-DK Datasheet - Page 31

RFIC TRANCEIVER DEVELOPMENT KIT

DR-TRC101-315-DK

Manufacturer Part Number
DR-TRC101-315-DK
Description
RFIC TRANCEIVER DEVELOPMENT KIT
Manufacturer
RFM
Type
Transceiver, SRRr

Specifications of DR-TRC101-315-DK

Frequency
315MHz
For Use With/related Products
TRC101-315
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
583-1051
Battery Detect Threshold and Clock Output Register
The Battery Detect Threshold and Clock Output Register configures the following:
The Low Battery Threshold is programmable from 2.2V to 5.3V using the following equation:
Bit [15..8] - Command Code: These bits are the command code that is sent serially to the processor that
identifies the bits to be written to the Battery Detect Threshold and Clock Output Register.
Bit [7..5] – Clock Output Frequency: These bit set the output frequency of the on-board clock that may
be used to run an external host processor. See Table 15 below.
Bit [4..0] – Low Battery Detect Value: These bits set the decimal value as used in the equation above to
calculate the value of the battery detect threshold voltage. When the battery level falls 50mV below this
value, the LBD bit (5) in the status register is set indicating that the battery level is below the programmed
threshold. This is useful in monitoring discharge sensitive batteries such as Lithium cells.
The Low Battery Detect can be enabled by setting the LBDEN bit (2) of the Power Management Register
and disabled by clearing the bit.
The Clock Output can be enabled by setting the CLKEN bit (0) of the Power Management Register and
disabled by clearing the bit.
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©by RF Monolithics, Inc.
Bit
15
1
Bit
14
1
where LBD[4..0] is the decimal value 0 to 31.
Bit
13
0
Low Battery Detect Threshold
Output Clock frequency
Bit
12
0
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Bit
11
0
VT = (LBD[4..0] / 10) + 2.2 (V)
Bit
10
0
Bit
9
0
Output Clock
Frequency
(MHz)
Bit
1.25
1.66
3.33
8
0
2.5
10
1
2
5
CLK2
Bit
7
TABLE 15.
CLK2
CLK1
Bit
0
0
0
0
1
1
1
1
6
CLK1
CLK0
Bit
0
0
1
1
0
0
1
1
5
[POR=C000h]
CLK0
LBD4
Bit
0
1
0
1
0
1
0
1
4
LBD3
Bit
3
LBD2
Bit
2
LBD1
TRC101 - 4/8/08
Bit
1
Page 31 of 42
LBD0
Bit
0

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