DR-TRC102-915-DK RFM, DR-TRC102-915-DK Datasheet - Page 3

• Manufacturer Part Number: DR-TRC102-915-DK
• Description: RFIC TRANCEIVER DEVELOPMENT KIT
• Manufacturer: RFM
• Type: Transceiver, SRRr

Specifications of DR-TRC102-915-DK

• Frequency: 900MHz ~ 929MHz
• For Use With/related Products: TRC102-915
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 583-1055

RF Monolithics, Inc.
DATA: Transmit Data In/Receive Data Out when internal FIFO not used. Use in conjunction with DCLK.
DCLK: Recovered Data Clock Output
CLK: Output Clock. Configurable from 1MHz to 10MHz.
RSSI: Analog RSSI Output. This is the raw DC value of the received signal strength.
INT: Interrupt Request Input - This pin may be configured as an active low external interrupt to the chip.
Microcontroller Programming Header
The dual row, 10-pin header is used to program the Silicon Labs C8051F330 microcontroller IC. This is
available if the user wishes to develop their code for the TRC102 and use the TRC102 development
board as a bench trial. The development board can be used as a development platform or as an
development tool for IC performance. Pin one is orientated to the red ribbon stripe.
Development Board Operation
Antennas
Two monopole antennas are included that are matched for performance to the ground plane area of the
DR boards. The antennas are a critical part of the performance of the communication link, thus, a
monopole antenna requires a good ground plane for proper performance.
Power Supply
Two pins are provided for connection of an external power supply or a portable battery pack. Note the
polarity of the connections before connecting any power source.
The TRC102 development board may operate up to +3.6V. Although the TRC102 IC may operate at a
higher supply voltage, the microcontroller is only rated to +3.6V.
LEDs
The on-board LED’s are provided for visual confirmation of programming data sent and received from the
software. On power-up the Green LED will illuminate indicating the board is powered and working. When
Rev00
Valid Data Detector Output– This pin may also be configured to indicate Valid Data when the
When a logic ‘0’ is applied to this pin, it causes the nIRQ pin (5) to toggle, signaling an interrupt to
an external processor. Reading the first four (4) bits of the status register tells the source of the
interrupt. This pin may be used as a wake-up event from sleep.
synchronous pattern recognition circuit indicates potentially real incoming data. The pin’s function is
configured within the RFDA software.
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