HSP50214BVCZ Intersil, HSP50214BVCZ Datasheet - Page 44
![IC DOWNCONVERTER 14BIT 120-MQFP](/photos/14/15/141537/120-mqfp_sml.jpg)
HSP50214BVCZ
Manufacturer Part Number
HSP50214BVCZ
Description
IC DOWNCONVERTER 14BIT 120-MQFP
Manufacturer
Intersil
Datasheet
1.HSP50214BVCZ.pdf
(62 pages)
Specifications of HSP50214BVCZ
Function
Downconverter
Rf Type
AMPS, CDMA, GSM, TDMA
Package / Case
120-MQFP, 120-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HSP50214BVCZ
Manufacturer:
AD
Quantity:
1 001
Applications
Composite Filter Response Example
For this example consider a total receive band roughly
25MHz wide containing 124 200kHz wide FDM channels as
shown in Figure 47. The design goal for the PDC is to tune
to and filter out a single 200kHz FDM channel from the FDM
band, passing only baseband samples onto the baseband
processor at a multiple of the 270.8 KBPS bit rate.
CODE C(2:0)
Don’t Care
TABLE 22. DEFINITION OF ADDRESS MAP (Continued)
READ
101
110
111
AGC Data
and Timing
Error
Not Used
Not Used
Status
STATUS
TYPE
AGC (must write to location 10 to
sample)
000- AGC LSB (lower 8-bits of linear
Control Word 3 used by multiplier)
mmmmmmmm LSB.
001- AGC MSB (4 shift control bits
and first three bits of linear) Control
Word oeeeemmm MSB. This yields
11-bits of the linear control mantissa.
010- Timing error LSB, not stabilized.
011- Timing error MSB, not
stabilized.
111- Status (6:0) consisting of
(6:4)-FIFO depth when output is in
FIFO Buffer RAM Output Mode.
(3)-EMPTY signalling the FIFO is
empty and the read pointer cannot be
advanced (Active High).
(2)-FULL signalling the FIFO is full
and new samples will not be written
(Active High).
(1)-READYB Output buffer has
reached the programmed threshold
in FIFO mode or the programmed
number of samples have been taken
in snapshot mode. (Active Low).
(0)-INTEGRATION has been
completed in the input level detector
and is ready to be read. (Active
High).
44
READ ADDRESS A(2:0)
HSP50214B
RF/IF Considerations
The input frequency to the PDC is dependent on the A/D
converter selected, the RF/IF frequency, the bandwidth of
interest and the sample rate of the converter. If the A/D
converter has sufficient bandwidth, then undersampling
techniques can be used to downconvert IF/RF frequencies
as part of the digitizing process, using the PDC to process a
lower frequency alias of the input signal.
For example, a 70MHz IF can be sampled at 40MHz and the
resulting 10MHz signal alias can be processed by the PDC
to perform the desired downconversion/tuning and filtering. If
the IF signal is less than 1/2 the sample frequency then
standard oversampling techniques can be used to process
the signal. Of the two techniques, only undersampling allows
part of the down conversion function to be brought into the
digital domain just through sampling, assuming that a
sampling frequency can be found that keeps the alias
signals low and that the A/D converter has the bandwidth to
accept the unconverted analog signal.
FIGURE 47. RECEIVE SIGNAL FREQUENCY SPECTRUM
124 CHANNELS
CHANNEL
200kHz
•
• •
FREQUENCY
FREQUENCY
May 1, 2007
FN4450.4