ATA3742P3-TGSY Atmel, ATA3742P3-TGSY Datasheet - Page 4

• Manufacturer Part Number: ATA3742P3-TGSY
• Description: IC UHF ASK/FSK RECEIVER 20SOIC
• Manufacturer: Atmel

Specifications of ATA3742P3-TGSY

• Frequency: 310MHz ~ 440MHz
• Sensitivity: -108dBm
• Data Rate - Maximum: 10 kBaud
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, TPM, Security Systems
• Current - Receiving: 7mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Operating Frequency (max): 450000kHz
• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant

3. RF Front End
4
ATA3742
The RF front end of the receiver is a heterodyne configuration that converts the input signal into
a 1 MHz IF signal. As seen in
amplifier), LO (local oscillator), a mixer and an RF amplifier.
The LO generates the carrier frequency for the mixer via a PLL synthesizer. The XTO (crystal
oscillator) generates the reference frequency f
erates the drive voltage frequency f
is divided by a factor of 64. The divided frequency is compared to f
detector. The current output of the phase frequency detector is connected to a passive loop filter
and thereby generates the control voltage V
is controlled in a way that f
using the following formula:
f
The XTO is a one-pin oscillator that operates at the series resonance of the quartz crystal. The
crystal should be connected to GND via the capacitor CL according to
that capacitor is recommended by the crystal supplier. The value of CL should be optimized for
the individual board layout to achieve the exact value of f
the system in terms of receiving bandwidth, the accuracy of the crystal and the XTO must be
considered.
Figure 3-1.
The passive loop filter connected to pin LF is designed for a loop bandwidth of B
This value for B
the appropriate loop filter components to achieve the desired loop bandwidth. If the filter compo-
nents are changed for any reason, please note that the maximum capacitive load at pin LF is
limited. If the capacitive load is exceeded, a bit check may no longer be possible since f
not settle in time before the bit check starts to evaluate the incoming data stream. In that case,
self-polling will also not work.
f
formula:
f
XTO
LO
LO
= f
is determined by the RF input frequency f
= f
RF
LO
– f
/ 64
IF
PLL Peripherals
Loop
exhibits the best possible noise performance of the LO.
LO
Figure 1-2 on page
/ 64 is equal to f
LFGND
LFVCC
LO
DVCC
XTO
for the mixer. f
LF
V
V
LF
S
S
XTO
for the VCO. By means of that configuration, V
XTO
RF
. The VCO (voltage-controlled oscillator) gen-
2, the front end consists of an LNA (low noise
and the IF frequency f
. If f
4.7 nF
LO
R
820
C
1
9
LO
is dependent on the voltage at pin LF. f
C
XTO
is determined, f
L
1 nF
and hereby of f
C
10
XTO
Figure
by the phase frequency
XTO
IF
LO
using the following
can be calculated
Figure 3-1
. When designing
3-1. The value of
Loop
4900B–RKE–11/07
= 100 kHz.
LO
shows
can-
LO
LF