TEA5764UK-G ST-Ericsson Inc, TEA5764UK-G Datasheet - Page 25

• Manufacturer Part Number: TEA5764UK-G
• Description: IC FM STEREO RADIO W/RDS 34WLB
• Manufacturer: ST-Ericsson Inc

Specifications of TEA5764UK-G

• Frequency: 76MHz ~ 90MHz, 87.5MHz ~ 108MHz
• Sensitivity: -108dBm
• Modulation Or Protocol: FM
• Applications: FM Radio Receiver
• Current - Receiving: 1.5mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2.5 V ~ 3.3 V
• Package / Case: 34-WLBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Operating Temperature: -
• Memory Size: -
• Data Rate - Maximum: -
• Other names: 935278071027

Philips Semiconductors
TEA5764UK_2
Product data sheet
10.1 DAV-A processing mode
The DAV-A processing mode is the standard processing mode used. In this mode, when a
data block has been decoded, it is transferred to the I
interrupts on the INTX line after every new block of RDS data that has been processed
and also sets the DAVFLG; see
registers.
If a data block is decoded and a new one arrives, pin INTX goes LOW again, the DAVFLG
will be set and the last block will be shifted to the previous block and the last decoded
block will be put in the last block. This means that all RDS data is still available in the BL
and BP registers.
When the I
decoded and a new one arrives, pin INTX goes LOW and the last block will be shifted to
the previous block and the last decoded block will be put in the last block. This means that
all RDS data is still available in the BL and BP registers but must be read. This is indicated
by the setting of bit DOVF.
If the I
within 20 ms after the INTX line has gone LOW and 2 ms before the arrival of a new block.
If this read is done at least 2 ms before the arrival of a new block, then BL and BP are read
and the data in the decoder buffer is then instantaneously shifted to the BL register. All
data is now read and bit DOVF will be reset.
2
C-bus registers are still not read, data will be lost, except when this read is done
2
C-bus registers are not read the DAVFLG will not be reset. If a data block is
Rev. 02 — 9 August 2005
Figure
9. The DAVFLG is reset by a read of the I
2
C-bus registers. It generates
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
TEA5764UK
FM radio + RDS
2
C-bus
24 of 64