SA58643DP,118 NXP Semiconductors, SA58643DP,118 Datasheet - Page 4

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SA58643DP,118

Manufacturer Part Number
SA58643DP,118
Description
IC RF SWITCH SPDT 8-TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SA58643DP,118

Package / Case
8-TSSOP
Rf Type
802.11a/b/g/Wi-Fi, WLAN
Frequency
0Hz ~ 1GHz
Features
SPDT
Maximum Operating Temperature
+ 85 C
Maximum Power Dissipation
568 mW
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Switches
Single
Switch Configuration
Single SPDT
Pin Count
8
Package Type
TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2376-2
935278795118
SA58643DP-T
NXP Semiconductors
10. Static characteristics
Table 5.
V
[1]
11. Dynamic characteristics
Table 6.
V
All measurements include the effects of the SA58643 evaluation board. Measurement system impedance is 50 .
[1]
SA58643_1
Product data sheet
Symbol
I
V
V
V
I
I
Symbol Parameter
t
t
t
V
P
IP3
IP2
NF
s
s
s
s
DD
IL(ENCH1)
IH(ENCH1)
d(off)
f(off)
r(on)
DD
DD
th
IH
IL
trt(p-p)
L(1dB)
21
12
22
11
2
2
2
2
= +5 V; T
The ENCH1 input must be connected to a valid logic level for proper operation of the SA58643.
= +5 V; T
The placement of the AC bypass capacitor is critical to achieve these specifications. See
details.
insertion power gain
isolation
output return loss
input return loss
turn-off delay time
turn-off fall time
turn-on rise time
peak-to-peak transient voltage
output power at 1 dB gain compression
third-order intercept point
second-order intercept point
noise figure
Static characteristics
Dynamic characteristics
Parameter
supply current
threshold voltage
HIGH-level input voltage
LOW-level input voltage
LOW-level input current on pin ENCH1
HIGH-level input current on pin ENCH1
amb
amb
= 25 C; unless otherwise specified.
= 25 C; unless otherwise specified.
Rev. 01 — 20 November 2006
Conditions
DC to 100 MHz
500 MHz
900 MHz
10 MHz
100 MHz
500 MHz
900 MHz
DC to 400 MHz
900 MHz
DC to 400 MHz
900 MHz
50 % TTL to (90 % to 10 %) RF
90 % to 10 % RF
10 % to 90 % RF
switching transients
DC to 1 GHz
100 MHz
100 MHz
Z
o
100 MHz
900 MHz
Conditions
TTL/CMOS logic
logic 1 level; enable channel 1
logic 0 level; enable channel 2
ENCH1 = 0.4 V
ENCH1 = 2.4 V
= 50
Single-Pole Double-Throw (SPDT) switch
Section 13 “Application information”
[1]
[1]
Min
-
-
-
70
-
-
24
-
-
-
-
-
-
-
-
-
-
-
-
-
Min
40
1.1
2.0
3.0
1
1
Typ
1
1.4
2
80
60
50
30
20
12
17
13
20
5
5
165
+18
+33
+52
1.0
2.0
Typ
170
1.25
-
-
0
0
SA58643
© NXP B.V. 2006. All rights reserved.
Max
-
-
2.8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
300
1.4
V
+0.8
+1
+1
DD
for more
Unit
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
ns
ns
ns
mV
dBm
dBm
dBm
dB
dB
4 of 16
Unit
V
V
V
A
A
A

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