ATA5423-PLSW Atmel, ATA5423-PLSW Datasheet - Page 34
![IC TXRX ASK/FSK 315MHZ 48QFN](/photos/7/34/73471/48-vqfn-6_543-5130_01-4_sml.jpg)
ATA5423-PLSW
Manufacturer Part Number
ATA5423-PLSW
Description
IC TXRX ASK/FSK 315MHZ 48QFN
Manufacturer
Atmel
Specifications of ATA5423-PLSW
Frequency
315MHz
Data Rate - Maximum
20kbps
Modulation Or Protocol
ASK, FSK
Applications
Alarm, ISM, Telemetry
Power - Output
5dBm
Sensitivity
-112.5dBm
Voltage - Supply
2.4 V ~ 3.6 V or 4.4 V ~ 6.6 V
Current - Receiving
10.5mA
Current - Transmitting
10mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
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Figure 5-3.
34
V
ATA5423/ATA5425/ATA5428/ATA5429
V
Thres_2
Thres_1
(Control Register 3)
DVCC_RESET
(Status Register)
Reset Timing
= 2.38V (typ)
VSOUT_EN
= 2.3V (typ)
N_RESET
LOW_Batt
VSOUT
VSOUT
(AVCC)
DVCC
The status bit Low_Batt is set to “1” if the voltage at pin VSOUT V
(typically 2.38V). Low_Batt is set to “0” if V
via the 4-wire serial interface or N_RESET is set to low.
If V
trol register 3 is “1”, a DVCC_RESET is also generated. If V
connected microcontroller by setting bit VSOUT_EN = 0, no DVCC_RESET is generated.
Note:
VSOUT
If VSOUT < V
is disabled and the transceiver is not programmable via the 4-wire serial interface.
drops below V
1.5V (typically)
V
SOUT
V
SOUT
> 2.3V and the XTO is running
Thres_1
> 2.38V and the XTO is running
Thres_1
(typically 2.3 V) the output of the pin CLK is low, the Microcontroller_Interface
(typically 2.3V), N_RESET is set to low. If bit VSOUT_EN in con-
VSOUT
exceeds V
Thres_2
VSOUT
and the status register is read
was already disabled by the
VSOUT
drops below V
4841D–WIRE–10/07
Thres_2
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