ATA5423-PLSW Atmel, ATA5423-PLSW Datasheet - Page 62

• Manufacturer Part Number: ATA5423-PLSW
• Description: IC TXRX ASK/FSK 315MHZ 48QFN
• Manufacturer: Atmel

Specifications of ATA5423-PLSW

• Frequency: 315MHz
• Data Rate - Maximum: 20kbps
• Modulation Or Protocol: ASK, FSK
• Applications: Alarm, ISM, Telemetry
• Power - Output: 5dBm
• Sensitivity: -112.5dBm
• Voltage - Supply: 2.4 V ~ 3.6 V or 4.4 V ~ 6.6 V
• Current - Receiving: 10.5mA
• Current - Transmitting: 10mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -

9.2
62
TX Operation
ATA5423/ATA5425/ATA5428/ATA5429
The transceiver is set to TX operation by using the bits OPM0 and OPM1 in the control
register 1.
Table 9-4.
Before activating TX mode, the TX parameters (bit rate, modulation scheme, etc.) must be
selected as illustrated in
control register 6, Lim_min0 to Lim_min5 in control register 5 and XLIM in control register 4 (see
section
register 4. The FSK frequency deviation is fixed to about ±16 kHz. If P_Mode is set to “1”, the
Manchester modulator is disabled and pattern mode is active (NRZ, see
After the transceiver is set to TX mode, the start-up mode is active and the PLL is enabled. If the
PLL is locked, the TX mode is active.
If the transceiver is in start-up or TX mode, the TX/RX data buffer can be loaded via the 4-wire
serial interface. After the first byte is in the buffer and the TX mode is active, the transceiver
starts transmitting automatically (beginning with the MSB). While transmitting it is always possi-
ble to load new data in the TX/RX data buffer. To prevent a buffer overflow or interruptions
during transmitting, the user must ensure that data is loaded at the same speed as it is
transmitted.
There is a counter that indicates the number of bytes to be transmitted (see section
Configuration” on page
ted, the counter is decremented. The counter value is available via the 4-wire serial interface. An
IRQ is issued if the counter (while counting down) reaches the value defined by the control bits
IR0 and IR1 in control register 1.
Note:
If T_Mode in control register 1 is set to “1”, the transceiver is in TX transparent mode. In this
mode the TX/RX data buffer is disabled and the TX data stream must be applied on pin
SDI_TMDI.
“Control Register” on page
Writing to the control register 1, 4, 5 or 6 during TX mode resets the TX/RX data buffer and the
counter which indicates the number of bytes to be transmitted.
Figure 9-11 on page 63
OPM1
Control Register 1
0
49). If a byte is loaded, the counter is incremented, if a byte is transmit-
Figure 9-11 on page
38). The modulation is selected with ASK/_NFSK in control
illustrates the flow chart of the TX transparent mode.
OPM0
63. The bit rate depends on Baud 0 and Baud 1 in
1
Table 9-5 on page
Function
TX mode
4841D–WIRE–10/07
“Transceiver
65).