ATMEGA128RZAV-8MU Atmel, ATMEGA128RZAV-8MU Datasheet - Page 131

• Manufacturer Part Number: ATMEGA128RZAV-8MU
• Description: MCU ATMEGA1281/AT86RF230 64-QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RZAV-8MU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 8kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 64-QFN
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2549M–AVR–09/10
Table 15-7
rect PWM mode.
Table 15-7.
Note:
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see
Table 15-8.
Note:
Mode
COM0B1
0
1
2
3
4
5
6
7
0
0
1
1
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
1. MAX
2. BOTTOM = 0x00
WGM2
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
pare Match is ignored, but the set or clear is done at TOP. See
page 126
0
0
0
0
1
1
1
1
Compare Output Mode, Phase Correct PWM Mode
Waveform Generation Mode Bit Description
COM0B0
= 0xFF
for more details.
WGM1
0
1
0
1
0
0
1
1
0
0
1
1
WGM0
Table
ATmega640/1280/1281/2560/2561
Clear OC0B on Compare Match when up-counting. Set OC0B on
Set OC0B on Compare Match when up-counting. Clear OC0B on
0
1
0
1
0
1
0
1
15-8. Modes of operation supported by the Timer/Counter
Timer/Counter
Normal port operation, OC0B disconnected.
PWM, Phase
PWM, Phase
Operation
Fast PWM
Fast PWM
Reserved
Reserved
“Modes of Operation” on page
Mode of
Compare Match when down-counting.
Compare Match when down-counting.
Normal
Correct
Correct
CTC
Description
Reserved.
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
–
–
(1)
“Phase Correct PWM Mode” on
Update of
Immediate
Immediate
BOTTOM
OCRx at
TOP
TOP
TOP
–
–
148).
Set on
TOV Flag
BOTTOM
BOTTOM
MAX
MAX
MAX
TOP
–
–
(1)(2)
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