ADF7021-NBCPZ Analog Devices Inc, ADF7021-NBCPZ Datasheet - Page 62

• Manufacturer Part Number: ADF7021-NBCPZ
• Description: IC TXRX 80-650/842-916MHZ 48LFCS
• Manufacturer: Analog Devices Inc

Specifications of ADF7021-NBCPZ

• Frequency: 80MHz ~ 650MHz, 842MHz ~ 916MHz
• Data Rate - Maximum: 33kbps
• Modulation Or Protocol: 2-FSK, 3-FSK, 4-FSK, MSK
• Applications: Keyless Entery, Pagers, WMTS
• Power - Output: -16dBm ~ 13dBm
• Sensitivity: -130dBm
• Voltage - Supply: 2.3 V ~ 6 V
• Current - Receiving: 26mA
• Current - Transmitting: 32.3mA @ 10dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LFCSP
• Receiving Current: 26.4mA
• Transmitting Current: 20.2mA
• Data Rate: 24Kbps
• Frequency Range: 80MHz To 916MHz
• Modulation Type: FSK, MSK
• Rf Ic Case Style: LFCSP
• No. Of Pins: 48
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Length (mm): 7mm
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF7021DBZ6 - BOARD EVAL ADF7021 608-614MHZEVAL-ADF7021DBZ5 - BOARD EVAL ADF7021EVAL-ADF7021DBZ3 - BOARD DAUGHTER FOR ADF7021EVAL-ADF7021DBZ2 - BOARD EVAL FOR ISM ADF7021
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant

ADF7021-N
REGISTER 14—TEST DAC REGISTER
The demodulator tuning parameters, PULSE_EXTENSION,
ED_LEAK_FACTOR, and ED_PEAK_RESPONSE, can be
enabled only by setting R15_DB[4:7] to 0x9.
Using the Test DAC to Implement Analog FM DEMOD
and Measuring SNR
For detailed information about using the test DAC, see
Application Note AN-852.
The test DAC allows the post demodulator filter out for both
linear and correlator demodulators to be viewed externally. The
test DAC also takes the 16-bit filter output and converts it to a
high frequency, single-bit output using a second-order, error
feedback Σ-Δ converter. The output can be viewed on the SWD
pin. This signal, when filtered appropriately, can then be used to
do the following:
•
•
Monitor the signals at the FSK post demodulator filter
output. This allows the demodulator output SNR to be
measured. Eye diagrams of the received bit stream can also
be constructed to measure the received signal quality.
Provide analog FM demodulation.
0
1
2
3
ED_PEAK_RESPONSE
FULL RESPONSE TO PEAK
0.5 RESPONSE TO PEAK
0.25 RESPONSE TO PEAK
0.125 RESPONSE TO PEAK
ED_LEAK_FACTOR
0
1
2
3
4
5
6
7
LEAKAGE =
2^–8
2^–9
2^–10
2^–11
2^–12
2^–13
2^–14
2^–15
TEST_DAC_GAIN
PULSE_EXTENSION
0
1
2
3
NO PULSE EXTENSION
EXTENDED BY 1
EXTENDED BY 2
EXTENDED BY 3
Figure 77. Register 14—Test DAC Register Map
Rev. 0 | Page 62 of 64
TEST_DAC_GAIN
0
1
...
15
NO GAIN
× 2^1
...
× 2^15
TEST_DAC_OFFSET
While the correlators and filters are clocked by DEMOD CLK,
CDR CLK clocks the test DAC. Note that although the test
DAC functions in regular user mode, the best performance is
achieved when the CDR CLK is increased to or above the
frequency of DEMOD CLK. The CDR block does not function
when this condition exists.
Programming Register 14 enables the test DAC. Both the
linear and correlator/demodulator outputs can be multiplexed
into the DAC.
Register 14 allows a fixed offset term to be removed from the
signal (to remove the IF component in the ddt case). It also has
a signal gain term to allow the usage of the maximum dynamic
range of the DAC.
ADDRESS
BITS