AC4790-200A-485 Laird Technologies, AC4790-200A-485 Datasheet - Page 18

• Manufacturer Part Number: AC4790-200A-485
• Description: TXRX 900MHZ 3.3-5.5V FHSS 200MW
• Manufacturer: Laird Technologies
• Series: AeroCommr

Specifications of AC4790-200A-485

• Frequency: 902MHz ~ 928MHz
• Data Rate - Maximum: 115.2kbps
• Modulation Or Protocol: FHSS, FSK
• Applications: AMR, Fire & Security Alarms, Telemetry
• Power - Output: 5mW ~ 200mW
• Sensitivity: -110dBm
• Voltage - Supply: 3.3V, 5V
• Current - Transmitting: 68mA
• Data Interface: Connector, 2 x 10 Header
• Antenna Connector: On-Board, Chip
• Operating Temperature: -40°C ~ 85°C
• Package / Case: Module
• Wireless Frequency: 900 MHz
• Interface Type: 20-pin mini connector
• Board Size: 49 mm x 42 mm x 5 mm
• Modulation: FHSS, FSK
• Security: 1 byte System ID, DES
• Operating Voltage: 3.3 V to 5.5 V
• Output Power: 200 mW
• Antenna: Integral and External Dipole
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Memory Size: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4
S
I
ERIAL
NTERFACE
In order for the OEM Host and a transceiver to communicate over the serial interface they need to have the same
serial data rate. Refer to the following sections to ensure that the OEM Host data rate matches the serial interface
baud rate.
S E R I A L C O M M U N I C A T I O N S
The AC4790 is a TTL device which can be interfaced to a compatible UART (microcontroller) or level translator to allow
connection to serial devices. UART stands for Universal Asynchronous Receiver Transmitter and its main function is to
transmit or receive serial data.
A s y n c h r o n o u s O p e r a t i o n
Since there is no separate clock in asynchronous operation, the receiver needs a method of synchronizing with the
transmitter. This is achieved by having a fixed baud rate and by using START and STOP bits. A typical asynchronous
mode signal is shown below.
F i g u r e 2 : A s y n c h r o n o u s M o d e S i g n a l
The UART outputs and inputs logic level signals on the TX and RX pins. The signal is high when no data is being
transmitted and goes low when transmission begins.
The signal stays low for the duration of the START bit and is followed by the data bits; LSB first. The STOP bit follows
the last data bit and is always high. After the STOP bit has completed, the START bit of the next transmission can
occur.
P a r i t y
A parity bit is used to provide error checking for a single bit error. When a single bit is used, parity can be either even
or odd. Even parity means that the number of ones in the data and parity sum to an even number and vice-versa. The
ninth data bit can be used as a parity bit if the data format requires eight data bits and a parity bit as shown below.
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