SI4205-BM Silicon Laboratories Inc, SI4205-BM Datasheet - Page 21
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SI4205-BM
Manufacturer Part Number
SI4205-BM
Description
IC TXRX TRI-BAND 32LGA
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI4205-BM.pdf
(38 pages)
Specifications of SI4205-BM
Frequency
850MHz, 900MHz, 1.8GHz, 1.9GHz
Modulation Or Protocol
GSM
Applications
Cellular, GSM Cellular Radio
Voltage - Supply
2.7 V ~ 3.3 V
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Package / Case
32-LGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
Operating Temperature
-
Sensitivity
-
Memory Size
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI4205-BM
Manufacturer:
SILICON
Quantity:
6 119
Company:
Part Number:
SI4205-BMR
Manufacturer:
SILAB
Quantity:
18 603
Control Registers
Notes:
Reg
3Ah
3Eh
3Fh
01h
02h
03h
04h
05h
11h
12h
19h
20h
21h
22h
23h
24h
31h
32h
33h
34h
35h
1. Any register not listed here is reserved and should not be written. Writing to reserved registers may result in
2. Master registers 20h to 24h simplify programming the Aero I to support initiation of receive (RX) and transmit (TX)
3. See “AN50: Aero Transceiver Programming Guide” for detailed instructions on register programming.
RF1 N Divider
RF2 N Divider
unpredictable behavior.
operations with only two register writes.
RX Master #1
RX Master #2
RX Master #3
TX Master #1
TX Master #2
DAC Config
Powerdown
IF N Divider
Reserved
Reserved
Reserved
Reserved
Name
Transmit
Receive
Config
Config
Config
Reset
Mode
D17 D16 D15 D14 D13 D12 D11 D10
RXBAND[1:0]
TXBAND[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FIF[3:0]
DPDS[2:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SDOSEL[3:0]
Table 8. Register Summary
LNAC[1:0]
DIAG[1:0]
0
0
0
0
0
0
0
0
0
0
DPDS[2:0]
0
0
0
0
0
0
0
0
0
0
SWAP
DGAIN[5:0]
LNAG[1:0]
0
0
0
0
0
0
0
0
0
0
Rev. 1.0
XPD1
0
0
0
1
1
0
0
0
0
0
0
0
XBUF
D9
0
0
0
1
0
0
0
0
0
0
0
BBG[1:0]
Bit
AGAIN[2:0]
XSEL
D8
0
0
0
0
0
N
0
N
0
0
N
N
0
0
0
N
RF1
RF2
RF1
RF2
IF
[15:0]
[15:0]
[15:0]
[15:0]
[15:0]
ZDBS
TXBAND[1:0]
D7
0
0
0
0
0
0
0
0
0
0
0
N
IF
[13:0]
D6
0
0
1
0
0
0
0
0
0
0
0
FIF[3:0]
ZERODEL[2:0]
AGAIN[2:0]
RXBAND[1:0]
D5
0
0
0
0
0
0
0
0
0
RFUP DIV2
D4
0
0
1
0
0
0
0
1
D3
DACCM[1:0]
LNAC[1:0]
DGAIN[5:0]
DGAIN[5:0]
0
0
0
0
0
0
0
1
1
0
Aero I
AUTO
D2
0
0
0
0
0
0
0
0
1
0
PDIB
D1
DACFS[1:0]
MODE[1:0]
0
1
0
0
0
0
0
1
0
LNAG[1:0]
21
RESET
CSEL
PDRB
D0
0
0
0
1
1
1
0