SI4205-BM Silicon Laboratories Inc, SI4205-BM Datasheet - Page 27

• Manufacturer Part Number: SI4205-BM
• Description: IC TXRX TRI-BAND 32LGA
• Manufacturer: Silicon Laboratories Inc

Specifications of SI4205-BM

• Frequency: 850MHz, 900MHz, 1.8GHz, 1.9GHz
• Modulation Or Protocol: GSM
• Applications: Cellular, GSM Cellular Radio
• Voltage - Supply: 2.7 V ~ 3.3 V
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Package / Case: 32-LGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -
• Operating Temperature: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

Register 12h. DAC Configuration
Name
Bit
17:11
6:4
3:2
1:0
Bit
10
9
8
7
D17 D16 D15 D14 D13 D12 D11 D10
0
0
ZERODEL[2:0]
DACCM[1:0]
DACFS[1:0]
Reserved
Reserved
Reserved
0
Name
XBUF
ZDBS
0
0
0
Program to zero.
Program to one.
Reference Buffer Power Control.
0 = Reference buffer disabled.
1 = Reference buffer automatically enabled (default).
Note: This bit should be set to 1 during normal operation. To achieve the lowest
Program to zero.
ZERODEL Band Select.
0 = Use ZERODEL[2:0] settings corresponding to DCS/PCS column
(default).
1 = Use RXBAND[1:0] to determine ZERODEL[2:0] delay setting (GSM
or DCS/PCS).
RX Output Zero Delay.
Code
000:
001:
010:
011:
100:
101:
110:
111:
Note: DAC input is forced to zero after PDN is deasserted. This feature can be
RX Output Common Mode Voltage.
00 = 1.0 V.
01 = 1.25 V (default).
10 = 1.35 V.
11 = Reserved.
RX Output Differential Full Scale Voltage.
00 = 1.0 V
01 = 2.0 V
10 = 3.5 V
11 = Reserved.
0
powerdown current (I
Register 11h must also be set appropriately.
used by the baseband processor to cancel the Si4205 DAC dc offset.
Offsets induced on channels due to 13 MHz harmonics will not be
included in the calibrated value.
PPD
PPD
PPD
1
Rev. 1.0
(default).
XBUF
D9
GSM
90 µs
110 µs
130 µs
140 µs
150 µs
160 µs
180 µs
Reserved
D8
0
PDN
DCS/PCS
130 µs
150 µs
170 µs
180 µs
190 µs
200 µs
220 µs
ZDBS
D7
), this bit should be set to 0. The XPD1 bit in
Function
D6
ZERODEL[2:0]
D5
D4
(default)
D3
DACCM[1:0]
D2
Aero I
D1
DACFS[1:0]
D0
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