SLRC40001T/OFE,112 NXP Semiconductors, SLRC40001T/OFE,112 Datasheet - Page 70

• Manufacturer Part Number: SLRC40001T/OFE,112
• Description: IC I.CODE SLRC400 READER 32-SOIC
• Manufacturer: NXP Semiconductors
• Series: I-Coder

Specifications of SLRC40001T/OFE,112

• Rf Type: Read Only
• Frequency: 13.56MHz
• Features: ISO15693, ISO18000-3
• Package / Case: 32-SOIC (0.300", 7.50mm Width)
• Product: RFID Readers
• Operating Temperature Range: - 25 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1124-5; 935269551112; SLRC400; SLRC41TOFED

Philips Semiconductors
I•CODE Reader IC
8
8.1
The SL RC400 indicates certain events by setting bit IRq in the PrimaryStatus-Register and, in addition, by
activating pin IRQ. The signal on pin IRQ may be used to interrupt the µ-Processor using its interrupt
handling capabilities. This allows the implementation of efficient µ-Processor software.
8.1.1
The following table shows the integrated interrupt flags, the related source and the condition for its setting.
The interrupt flag TimerIRq indicates an interrupt set by the timer unit. The setting is done when the timer
decrements from 1 either down to zero (TAutoRestart flag disabled) or to the TPreLoad value if TAutoRestart
is enabled.
The TxIRq bit indicates interrupts from different sources. If the transmitter is active and the state changes
from sending data to transmitting the end of frame pattern, the transmitter unit sets automatically the interrupt
bit. The CRC coprocessor sets TxIRq after having processed all data from the FIFO buffer. This is indicated
by the flag CRCReady = 1. If the E
E2Ready = 1.
The RxIRq flag indicates an interrupt when the end of the received data is detected.
The flag IdleIRq is set if a command finishes and the content of the command register changes to idle.
The flag HiAlertIRq is set to 1 if the HiAlert bit is set to one, that means the FIFO buffer has reached the level
indicated by the bit WaterLevel, see chapter 7.4.
The flag LoAlertIRq is set to 1 if the LoAlert bit is set to one, that means the FIFO buffer has reached the
level indicated by the bit WaterLevel, see chapter 7.4.
Interrupt Flag
INTERRUPT REQUEST SYSTEM
LoAlertIRq
HiAlertIRq
Overview
TimerIRq
IdleIRq
RxIRq
TxIRq
INTERRUPT SOURCES OVERVIEW
Command Register
CRC-Coprocessor
Interrupt Source
FIFO-buffer
Transmitter
FIFO-buffer
Timer Unit
Receiver
2
Prom programming has finished the TxIRq bit is set, indicated by the bit
Table 8-1: Interrupt Sources
the timer counts from 1 to 0
a data stream, transmitted to the label, ends
all data from the FIFO buffer has been processed
a data stream, received from the label, ends
a command execution finishes
the FIFO-buffer is getting full
the FIFO-buffer is getting empty
70
Product Specification Rev. 3.1 August 2004
Is set automatically, when
SL RC400