MFRC52301HN1,157 NXP Semiconductors, MFRC52301HN1,157 Datasheet - Page 21

• Manufacturer Part Number: MFRC52301HN1,157
• Description: IC READER 13.56MHZ 32-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of MFRC52301HN1,157

• Frequency: 13.56MHz
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Rf Type: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935282956157

NXP Semiconductors
MFRC523_34
Product data sheet
PUBLIC
8.3.4.10 Serial data transfer format in HS mode
8.3.4.8 High-speed mode
8.3.4.9 High-speed transfer
In High-speed mode (HS mode), the device can transfer information at data rates of up to
3.4 Mbit/s, while remaining fully downward-compatible with Fast or Standard modes
(F/S modes) for bidirectional communication in a mixed-speed bus system.
To achieve data rates of up to 3.4 Mbit/s the following improvements have been made to
I
The HS mode serial data transfer format meets the Standard mode I
HS mode can only start after all of the following conditions (all of which are in F/S mode):
When HS mode starts, the active master sends a repeated START condition (Sr) followed
by a 7-bit slave address with a R/W bit address and receives an acknowledge bit (A) from
the selected MFRC523.
Data transfer continues in HS mode after the next repeated START (Sr), only switching
back to F/S mode after a STOP condition (P). To reduce the overhead of the master code,
a master links a number of HS mode transfers, separated by repeated START conditions
(Sr).
2
1. START condition (S)
2. 8-bit master code (00001 XXXb)
3. Not-acknowledge bit (A)
Fig 18. I
C-bus operation.
•
•
S
The inputs of the device in HS mode incorporate spike suppression, a Schmitt trigger
on the SDA and SCL inputs and different timing constants when compared to
F/S mode
The output buffers of the device in HS mode incorporate slope control of the falling
edges of the SDA and SCL signals with different fall times compared to F/S mode
MASTER CODE
F/S mode
2
C-bus HS mode protocol switch
All information provided in this document is subject to legal disclaimers.
Rev. 3.5 — 24 September 2010
A
Sr SLAVE ADDRESS
115235
HS mode (current-source for SCL HIGH enabled)
R/W
A
(n-bytes + A)
DATA
A/A
Contactless reader IC
2
MFRC523
C-bus specification.
Sr
P
HS mode continues
© NXP B.V. 2010. All rights reserved.
SLAVE ADDRESS
F/S mode
001aak749
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