MFRC52301HN1,157 NXP Semiconductors, MFRC52301HN1,157 Datasheet - Page 79

• Manufacturer Part Number: MFRC52301HN1,157
• Description: IC READER 13.56MHZ 32-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of MFRC52301HN1,157

• Frequency: 13.56MHz
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Rf Type: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935282956157

NXP Semiconductors
16. Test information
MFRC523_34
Product data sheet
PUBLIC
16.1.1 Self-test
16.1.2 Test bus
16.1 Test signals
The MFRC523 has the capability to perform a digital self-test. The self-test is started by
using the following procedure:
FIFO buffer byte values for version B2h:
0x00, 0xEB, 0x66, 0xBA, 0x57, 0xBF, 0x23, 0x95, 0xD0, 0xE3, 0x0D, 0x3D, 0x27, 0x89,
The test bus is used for production tests. The following configuration can be used to
improve the design of a system using the MFRC523. The test bus allows internal signals
to be routed to the digital interface. The test bus comprises two sets of test signals which
are selected using their subaddress specified in the TestSel2Reg register’s
TestBusSel[4:0] bits. The test signals and their related digital output pins are described in
Table 155
Table 155. Test bus signals: TestBusSel[4:0] = 07h
Pins
D6
D5
D4
D3
D2
D1
1. Perform a soft reset.
2. Clear the internal buffer by writing 25 bytes of 00h and implement the Config
3. Enable the self-test by writing 09h to the AutoTestReg register.
4. Write 00h to the FIFO buffer.
5. Start the self-test with the CalcCRC command.
6. The self-test is initiated.
7. When the self-test has completed, the FIFO buffer contains the following 64 bytes:
command.
0x5C, 0xDE, 0x9D, 0x3B, 0xA7, 0x00, 0x21, 0x5B, 0x89, 0x82, 0x51, 0x3A, 0xEB,
0x02, 0x0C, 0xA5, 0x00, 0x49, 0x7C, 0x84, 0x4D, 0xB3, 0xCC, 0xD2, 0x1B, 0x81,
0x5D, 0x48, 0x76, 0xD5, 0x71, 0x61, 0x21, 0xA9, 0x86, 0x96, 0x83, 0x38, 0xCF,
0x9D, 0x5B, 0x6D, 0xDC, 0x15, 0xBA, 0x3E, 0x7D, 0x95, 0x3B, 0x2F
and
Internal
signal name
s_data
s_coll
s_valid
s_over
RCV_reset
-
Table
All information provided in this document is subject to legal disclaimers.
Rev. 3.5 — 24 September 2010
156.
Description
received data stream
bit-collision detected (106 kBd only)
s_data and s_coll signals are valid
receiver has detected a stop condition
receiver is reset
reserved
115235
Contactless reader IC
MFRC523
© NXP B.V. 2010. All rights reserved.
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