T555711-DDW Atmel, T555711-DDW Datasheet - Page 15

• Manufacturer Part Number: T555711-DDW
• Description: IC IDIC R/W RFID 330BIT ON-CHIP
• Manufacturer: Atmel
• Series: T555711r

Specifications of T555711-DDW

• Rf Type: Read / Write
• Frequency: 125kHz
• Features: 330-bit EEPROM
• Package / Case: DICE
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

6.1
6.2
Figure 6-1.
Table 6-1.
4517J–RFID–03/06
Mode
FSK1
FSK2
PSK1
PSK2
PSK3
Manchester
Biphase 1 (’50)
Biphase 2 (’57)
NRZ
Notes:
(1)
(1)
(2)
(2)
(2)
Binary Bit-rate Generator
OTP Functionality
L
1. A common multiple of bitrate and FSK frequencies is recommended.
2. In PSK mode the selected data rate has to be an integer multiple of the PSK sub-carrier frequency.
0 Unlocked
1 Locked
1) If Master Key = 6 and bit 15 set, then test-mode access is d i sabled and extended mode is active
2) If Master Key = 9 and bit 15 set, then extended mode is enabled
Master Key
1 0 0 1 0 0 0 0
1 2 3 4
Note 1), 2)
Block 0 — Configuration Map in Extended Mode (X-mode)
T5557 Types of Modulation in Extended Mode
Direct Data Output Encoding
FSK/5-/8
FSK/10-/8
Phase change when input changes
Phase change on bit clock if input high
Phase change on rising edge of input
“0” = falling edge, “1” = rising edge on mid-bit
“1” creates an additional mid-bit change
“0” creates an additional mid-bit change
“1” = damping on, “0” = damping off
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
In extended mode the data rate is binary programmable to operate at any data rate between
RF/2 and RF/128 as given in the formula below.
Data rate = RF/(2n+2)
If the OTP bit is set to “1”, all memory blocks are write protected and behave as if all lock bits are
set to 1. If the master key is set to “6” additionally, the T5557 mode of operation is locked forever
(= OTP functionality).
If the master key is set to “9”, the test-mode access allows the re-configuration of the tag again.
“0” = RF/5; “1” = RF/8
“0” = RF/10; “1” = RF/8
n5 n4 n3 n2 n1 n0
Data Bit Rate
RF/(2n+2)
Direct
PSK1
PSK2
PSK3
FSK1
FSK2
Manchester
Biphase ('50)
Biphase ('57)
1
0 0 0 0 0
0 0 0 0 1
0 0 0 1 0
0 0 0 1 1
0 0 1 0 0
0 0 1 0 1
0 1 0 0 0
1 0 0 0 0
1 1 0 0 0
Modulation
Inverse Data Output Encoding
FSK/8-/5
FSK/8-/10
Phase change when input changes
Phase change on bit clock if input low
Phase change on falling edge of input
“1” = falling edge, “1” = rising edge on mid-bit
“0” = damping on, “1” = damping off
“0” creates an additional mid-bit change
“1” creates an additional mid-bit change
PSK-
0 0
0 1
1 0
1 1
CF
“0” = RF/8; “1” = RF/5
“0” = RF/8; “1” = RF/10
RF/2
RF/4
RF/8
Res.
BLOCK
MAX-
T5557
(= FSK1a)
(= FSK2a)
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