PIC18LF26K22-I/ML Microchip Technology, PIC18LF26K22-I/ML Datasheet - Page 33
![IC PIC MCU 64KB FLASH 28QFN](/photos/19/6/190629/4733462_sml.jpg)
PIC18LF26K22-I/ML
Manufacturer Part Number
PIC18LF26K22-I/ML
Description
IC PIC MCU 64KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18LF26K22-I/ML
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1KB
Ram Memory Size
3896Byte
Cpu Speed
64MHz
No. Of Timers
7
Processor Series
PIC18LF
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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REGISTER 2-2:
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
‘1’ = Bit is set
-n/n = Value at POR and BOR/Value at all other Resets
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
PLLRDY
R-0/0
The SOSCGO bit is only reset on a POR Reset.
PLLRDY: PLL Run Status bit
1 = System clock comes from 4xPLL
0 = System clock comes from an oscillator, other than 4xPLL
SOSCRUN: SOSC Run Status bit
1 = System clock comes from secondary SOSC
0 = System clock comes from an oscillator, other than SOSC
Unimplemented: Read as ‘0’.
MFIOSEL: MFINTOSC Select bit
1 = MFINTOSC is used in place of HFINTOSC frequencies of 500 kHz, 250 kHz and 31.25 kHz
0 = MFINTOSC is not used
SOSCGO
1 = Secondary oscillator is enabled.
0 = Secondary oscillator is shut off if no other sources are requesting it.
PRISD: Primary Oscillator Drive Circuit Shutdown bit
1 = Oscillator drive circuit on
0 = Oscillator drive circuit off (zero power)
MFIOFS: MFINTOSC Frequency Stable bit
1 = MFINTOSC is stable
0 = MFINTOSC is not stable
LFIOFS: LFINTOSC Frequency Stable bit
1 = LFINTOSC is stable
0 = LFINTOSC is not stable
SOSCRUN
R-0/q
OSCCON2: OSCILLATOR CONTROL REGISTER 2
W = Writable bit
‘0’ = Bit is cleared
(1)
: Secondary Oscillator Start Control bit
U-0
—
U = Unimplemented bit, read as ‘0’
x = Bit is unknown
MFIOSEL
R/W-0/0
Preliminary
SOSCGO
R/W-0/u
PIC18(L)F2X/4XK22
(1)
R/W-1/1
PRISD
q = depends on condition
MFIOFS
R-x/u
DS41412D-page 33
LFIOFS
R-0/0
bit 0
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